Commit 3c206fa7 authored by Ian Munsie's avatar Ian Munsie Committed by Michael Ellerman
Browse files

cxl: Ensure PSL interrupt is configured for contexts with no AFU IRQs 



In the cxl kernel API, it is possible to create a context and start it
without allocating any interrupts. Since we assign or allocate the PSL
interrupt when allocating AFU interrupts this will lead to a situation
where we start the context with no means to take any faults.

The user API is not affected as it always goes through the cxl interrupt
allocation code paths and will have the PSL interrupt allocated or
assigned, even if no AFU interrupts were requested.

This checks that at least one interrupt is configured at the time of
attach, and if not it will assign the multiplexed PSL interrupt for
powernv, or allocate a single interrupt for PowerVM.

Signed-off-by: default avatarIan Munsie <imunsie@au1.ibm.com>
Reviewed-by: default avatarFrederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 0e5b5ba1

drivers/misc/cxl/guest.c

+12 −0
Original line number Diff line number Diff line
@@ -552,6 +552,17 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr) 


	elem->common.sstp0  = cpu_to_be64(ctx->sstp0);

	elem->common.sstp1  = cpu_to_be64(ctx->sstp1);



	/*

	 * Ensure we have at least one interrupt allocated to take faults for

	 * kernel contexts that may not have allocated any AFU IRQs at all:

	 */

	if (ctx->irqs.range[0] == 0) {

		rc = afu_register_irqs(ctx, 0);

		if (rc)

			goto out_free;

	}



	for (r = 0; r < CXL_IRQ_RANGES; r++) {

		for (i = 0; i < ctx->irqs.range[r]; i++) {

			if (r == 0 && i == 0) {
@@ -597,6 +608,7 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr) 
		enable_afu_irqs(ctx);

	}



out_free:

	free_page((u64)elem);

	return rc;

}

drivers/misc/cxl/native.c

+9 −0
Original line number Diff line number Diff line
@@ -534,6 +534,15 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr) 
	ctx->elem->common.sstp0 = cpu_to_be64(ctx->sstp0);

	ctx->elem->common.sstp1 = cpu_to_be64(ctx->sstp1);



	/*

	 * Ensure we have the multiplexed PSL interrupt set up to take faults

	 * for kernel contexts that may not have allocated any AFU IRQs at all:

	 */

	if (ctx->irqs.range[0] == 0) {

		ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq;

		ctx->irqs.range[0] = 1;

	}



	for (r = 0; r < CXL_IRQ_RANGES; r++) {

		ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]);

		ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]);

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