Commit 3be66711 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next 

1) includes all the drm/msm side of things for upstream kernel working
on dragonboard 410c (still some pending work on adv7533 bridge chip)
2) initial support for msm8x94 (snapdragon 810)
3) support for msm8x74v1 (in addition to existing v2 support)
4) support for dma planes on mdp5 (additional planes that cannot scale/csc)
5) more yuv format support for mdp5 (single plane vyuy/uyvy/yuyv/yvyu,
two plane nv16/nv61, and three plane yuv420/yvu420)
6) rotation support for mdp5
7) initial hdcp support
8) fixes, etc

* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (46 commits)
  drm/msm/dsi: Introduce DSI configuration module
  drm/msm/dsi: Make each PHY type compilation independent
  drm/msm/dsi: Split PHY drivers to separate files
  drm/msm/dsi: Return void from msm_dsi_phy_disable()
  drm/msm/dsi: Specify bitmask to set source PLL
  drm/msm/mdp: Clear pending interrupt status before enable interrupt
  drm/msm/mdp5: Add rotation (hflip/vflip) support to MDP5 planes (v2)
  drm/msm: add calls to prepare and unprepare panel
  drm/msm/dsi: Modify dsi manager bridge ops to work with external bridges
  drm/msm/dsi: Allow dsi to connect to an external bridge
  drm/msm/dsi: Create a helper to check if there is a connected device
  drm/msm/dsi: Refer to connected device as 'device' instead of 'panel'
  drm/msm/dsi: Make TE gpio optional
  drm/msm: mdp4 lvds: get panel node via of graph parsing
  drm/msm: dsi host: Use device graph parsing to parse connected panel
  drm/msm: dsi host: add missing of_node_put()
  drm/msm: Enable clocks during enable/disable_vblank() callbacks
  drm/msm/mdp5: Add support for msm8x74v1
  drm/msm/mdp5: Add DMA pipe planes for MDP5
  drm/msm/mdp: Add capabilities to MDP planes (v2)
  ...
parents d3638ac4 d248b61f

Documentation/devicetree/bindings/drm/msm/dsi.txt

+35 −6
Original line number Diff line number Diff line
@@ -30,20 +30,27 @@ Optional properties: 
- panel@0: Node of panel connected to this DSI controller.

  See files in Documentation/devicetree/bindings/panel/ for each supported

  panel.

- qcom,dual-panel-mode: Boolean value indicating if the DSI controller is

- qcom,dual-dsi-mode: Boolean value indicating if the DSI controller is

  driving a panel which needs 2 DSI links.

- qcom,master-panel: Boolean value indicating if the DSI controller is driving

- qcom,master-dsi: Boolean value indicating if the DSI controller is driving

  the master link of the 2-DSI panel.

- qcom,sync-dual-panel: Boolean value indicating if the DSI controller is

- qcom,sync-dual-dsi: Boolean value indicating if the DSI controller is

  driving a 2-DSI panel whose 2 links need receive command simultaneously.

- interrupt-parent: phandle to the MDP block if the interrupt signal is routed

  through MDP block

- pinctrl-names: the pin control state names; should contain "default"

- pinctrl-0: the default pinctrl state (active)

- pinctrl-n: the "sleep" pinctrl state

- port: DSI controller output port. This contains one endpoint subnode, with its

  remote-endpoint set to the phandle of the connected panel's endpoint.

  See Documentation/devicetree/bindings/graph.txt for device graph info.



DSI PHY:

Required properties:

- compatible: Could be the following

  * "qcom,dsi-phy-28nm-hpm"

  * "qcom,dsi-phy-28nm-lp"

  * "qcom,dsi-phy-20nm"

- reg: Physical base address and length of the registers of PLL, PHY and PHY

  regulator

- reg-names: The names of register regions. The following regions are required:
@@ -59,6 +66,10 @@ Required properties: 
  * "iface_clk"

- vddio-supply: phandle to vdd-io regulator device node



Optional properties:

- qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY

  regulator is wanted.



Example:

	mdss_dsi0: qcom,mdss_dsi@fd922800 {

		compatible = "qcom,mdss-dsi-ctrl";
@@ -90,9 +101,13 @@ Example: 


		qcom,dsi-phy = <&mdss_dsi_phy0>;



		qcom,dual-panel-mode;

		qcom,master-panel;

		qcom,sync-dual-panel;

		qcom,dual-dsi-mode;

		qcom,master-dsi;

		qcom,sync-dual-dsi;



		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&mdss_dsi_active>;

		pinctrl-1 = <&mdss_dsi_suspend>;



		panel: panel@0 {

			compatible = "sharp,lq101r1sx01";
@@ -101,6 +116,18 @@ Example: 


			power-supply = <...>;

			backlight = <...>;



			port {

				panel_in: endpoint {

					remote-endpoint = <&dsi0_out>;

				};

			};

		};



		port {

			dsi0_out: endpoint {

				remote-endpoint = <&panel_in>;

			};

		};

	};
@@ -117,4 +144,6 @@ Example: 
		clock-names = "iface_clk";

		clocks = <&mmcc MDSS_AHB_CLK>;

		vddio-supply = <&pma8084_l12>;



		qcom,dsi-phy-regulator-ldo-mode;

	};

Documentation/devicetree/bindings/drm/msm/hdmi.txt

+2 −1
Original line number Diff line number Diff line
@@ -2,8 +2,9 @@ Qualcomm adreno/snapdragon hdmi output 


Required properties:

- compatible: one of the following

   * "qcom,hdmi-tx-8994"

   * "qcom,hdmi-tx-8084"

   * "qcom,hdmi-tx-8074"

   * "qcom,hdmi-tx-8974"

   * "qcom,hdmi-tx-8660"

   * "qcom,hdmi-tx-8960"

- reg: Physical base address and length of the controller's registers

drivers/gpu/drm/msm/Kconfig

+15 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ config DRM_MSM 
	select DRM_PANEL

	select SHMEM

	select TMPFS

	select QCOM_SCM

	default y

	help

	  DRM/KMS driver for MSM/snapdragon.
@@ -53,3 +54,17 @@ config DRM_MSM_DSI_PLL 
	help

	  Choose this option to enable DSI PLL driver which provides DSI

	  source clocks under common clock framework.



config DRM_MSM_DSI_28NM_PHY

	bool "Enable DSI 28nm PHY driver in MSM DRM"

	depends on DRM_MSM_DSI

	default y

	help

	  Choose this option if the 28nm DSI PHY is used on the platform.



config DRM_MSM_DSI_20NM_PHY

	bool "Enable DSI 20nm PHY driver in MSM DRM"

	depends on DRM_MSM_DSI

	default y

	help

	  Choose this option if the 20nm DSI PHY is used on the platform.

drivers/gpu/drm/msm/Makefile

+11 −4
Original line number Diff line number Diff line 
ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm

ccflags-$(CONFIG_DRM_MSM_DSI_PLL) += -Idrivers/gpu/drm/msm/dsi

ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi



msm-y := \

	adreno/adreno_device.o \
@@ -10,6 +10,7 @@ msm-y := \ 
	hdmi/hdmi_audio.o \

	hdmi/hdmi_bridge.o \

	hdmi/hdmi_connector.o \

	hdmi/hdmi_hdcp.o \

	hdmi/hdmi_i2c.o \

	hdmi/hdmi_phy_8960.o \

	hdmi/hdmi_phy_8x60.o \
@@ -53,12 +54,18 @@ msm-$(CONFIG_DRM_MSM_FBDEV) += msm_fbdev.o 
msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o



msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \

			dsi/dsi_cfg.o \

			dsi/dsi_host.o \

			dsi/dsi_manager.o \

			dsi/dsi_phy.o \

			dsi/phy/dsi_phy.o \

			mdp/mdp5/mdp5_cmd_encoder.o



msm-$(CONFIG_DRM_MSM_DSI_PLL) += dsi/pll/dsi_pll.o \

				dsi/pll/dsi_pll_28nm.o

msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o

msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o



ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)

msm-y += dsi/pll/dsi_pll.o

msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o

endif



obj-$(CONFIG_DRM_MSM)	+= msm.o

drivers/gpu/drm/msm/adreno/a2xx.xml.h

+9 −9
Original line number Diff line number Diff line
@@ -8,15 +8,15 @@ http://github.com/freedreno/envytools/ 
git clone https://github.com/freedreno/envytools.git



The rules-ng-ng source files this header was generated from are:

- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml               (    364 bytes, from 2013-11-30 14:47:15)

- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1453 bytes, from 2013-03-31 16:51:27)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2014-06-02 15:21:30)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2014-11-13 22:44:30)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14895 bytes, from 2015-04-19 15:23:28)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  66709 bytes, from 2015-04-12 18:16:35)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  60633 bytes, from 2015-05-20 14:48:19)



Copyright (C) 2013-2014 by the following authors:

- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml               (    364 bytes, from 2015-05-20 20:03:07)

- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1453 bytes, from 2015-05-20 20:03:07)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2015-05-20 20:03:14)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10551 bytes, from 2015-05-20 20:03:14)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14968 bytes, from 2015-05-20 20:12:27)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  67120 bytes, from 2015-08-14 23:22:03)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  63785 bytes, from 2015-08-14 18:27:06)



Copyright (C) 2013-2015 by the following authors:

- Rob Clark <robdclark@gmail.com> (robclark)



Permission is hereby granted, free of charge, to any person obtaining

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