Commit 3ada9c12 authored by David Daney's avatar David Daney Committed by Jeff Garzik
Browse files

libata: Add another column to the ata_timing table. 



The forthcoming OCTEON SOC Compact Flash driver needs an additional
timing value that was not available in the ata_timing table.  I add a
new column for dmack_hold time.  The values were obtained from the
Compact Flash specification Rev 4.1.

Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: default avatarJeff Garzik <jgarzik@redhat.com>
parent 68139520

drivers/ata/libata-core.c

+37 −35
Original line number Diff line number Diff line
@@ -3029,33 +3029,33 @@ int sata_set_spd(struct ata_link *link) 
 */



static const struct ata_timing ata_timing[] = {

/*	{ XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960,   0 }, */

	{ XFER_PIO_0,     70, 290, 240, 600, 165, 150, 600,   0 },

	{ XFER_PIO_1,     50, 290,  93, 383, 125, 100, 383,   0 },

	{ XFER_PIO_2,     30, 290,  40, 330, 100,  90, 240,   0 },

	{ XFER_PIO_3,     30,  80,  70, 180,  80,  70, 180,   0 },

	{ XFER_PIO_4,     25,  70,  25, 120,  70,  25, 120,   0 },

	{ XFER_PIO_5,     15,  65,  25, 100,  65,  25, 100,   0 },

	{ XFER_PIO_6,     10,  55,  20,  80,  55,  20,  80,   0 },



	{ XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 960,   0 },

	{ XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 480,   0 },

	{ XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 240,   0 },



	{ XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 480,   0 },

	{ XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 150,   0 },

	{ XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 120,   0 },

	{ XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 100,   0 },

	{ XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20,  80,   0 },



/*	{ XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0,   0, 150 }, */

	{ XFER_UDMA_0,     0,   0,   0,   0,   0,   0,   0, 120 },

	{ XFER_UDMA_1,     0,   0,   0,   0,   0,   0,   0,  80 },

	{ XFER_UDMA_2,     0,   0,   0,   0,   0,   0,   0,  60 },

	{ XFER_UDMA_3,     0,   0,   0,   0,   0,   0,   0,  45 },

	{ XFER_UDMA_4,     0,   0,   0,   0,   0,   0,   0,  30 },

	{ XFER_UDMA_5,     0,   0,   0,   0,   0,   0,   0,  20 },

	{ XFER_UDMA_6,     0,   0,   0,   0,   0,   0,   0,  15 },

/*	{ XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0,  960,   0 }, */

	{ XFER_PIO_0,     70, 290, 240, 600, 165, 150, 0,  600,   0 },

	{ XFER_PIO_1,     50, 290,  93, 383, 125, 100, 0,  383,   0 },

	{ XFER_PIO_2,     30, 290,  40, 330, 100,  90, 0,  240,   0 },

	{ XFER_PIO_3,     30,  80,  70, 180,  80,  70, 0,  180,   0 },

	{ XFER_PIO_4,     25,  70,  25, 120,  70,  25, 0,  120,   0 },

	{ XFER_PIO_5,     15,  65,  25, 100,  65,  25, 0,  100,   0 },

	{ XFER_PIO_6,     10,  55,  20,  80,  55,  20, 0,   80,   0 },



	{ XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 50, 960,   0 },

	{ XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 30, 480,   0 },

	{ XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 20, 240,   0 },



	{ XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 20, 480,   0 },

	{ XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 5,  150,   0 },

	{ XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 5,  120,   0 },

	{ XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 5,  100,   0 },

	{ XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20, 5,   80,   0 },



/*	{ XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0, 0,    0, 150 }, */

	{ XFER_UDMA_0,     0,   0,   0,   0,   0,   0, 0,    0, 120 },

	{ XFER_UDMA_1,     0,   0,   0,   0,   0,   0, 0,    0,  80 },

	{ XFER_UDMA_2,     0,   0,   0,   0,   0,   0, 0,    0,  60 },

	{ XFER_UDMA_3,     0,   0,   0,   0,   0,   0, 0,    0,  45 },

	{ XFER_UDMA_4,     0,   0,   0,   0,   0,   0, 0,    0,  30 },

	{ XFER_UDMA_5,     0,   0,   0,   0,   0,   0, 0,    0,  20 },

	{ XFER_UDMA_6,     0,   0,   0,   0,   0,   0, 0,    0,  15 },



	{ 0xFF }

};
@@ -3071,6 +3071,7 @@ static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q 
	q->cyc8b	= EZ(t->cyc8b      * 1000,  T);

	q->active	= EZ(t->active     * 1000,  T);

	q->recover	= EZ(t->recover    * 1000,  T);

	q->dmack_hold	= EZ(t->dmack_hold * 1000,  T);

	q->cycle	= EZ(t->cycle      * 1000,  T);

	q->udma		= EZ(t->udma       * 1000, UT);

}
@@ -3084,6 +3085,7 @@ void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, 
	if (what & ATA_TIMING_CYC8B  ) m->cyc8b   = max(a->cyc8b,   b->cyc8b);

	if (what & ATA_TIMING_ACTIVE ) m->active  = max(a->active,  b->active);

	if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);

	if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);

	if (what & ATA_TIMING_CYCLE  ) m->cycle   = max(a->cycle,   b->cycle);

	if (what & ATA_TIMING_UDMA   ) m->udma    = max(a->udma,    b->udma);

}

include/linux/libata.h

+6 −3
Original line number Diff line number Diff line
@@ -401,12 +401,14 @@ enum { 
				  ATA_TIMING_CYC8B,

	ATA_TIMING_ACTIVE	= (1 << 4),

	ATA_TIMING_RECOVER	= (1 << 5),

	ATA_TIMING_CYCLE	= (1 << 6),

	ATA_TIMING_UDMA		= (1 << 7),

	ATA_TIMING_DMACK_HOLD	= (1 << 6),

	ATA_TIMING_CYCLE	= (1 << 7),

	ATA_TIMING_UDMA		= (1 << 8),

	ATA_TIMING_ALL		= ATA_TIMING_SETUP | ATA_TIMING_ACT8B |

				  ATA_TIMING_REC8B | ATA_TIMING_CYC8B |

				  ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |

				  ATA_TIMING_CYCLE | ATA_TIMING_UDMA,

				  ATA_TIMING_DMACK_HOLD | ATA_TIMING_CYCLE |

				  ATA_TIMING_UDMA,

};



enum ata_xfer_mask {
@@ -866,6 +868,7 @@ struct ata_timing { 
	unsigned short cyc8b;		/* t0 for 8-bit I/O */

	unsigned short active;		/* t2 or tD */

	unsigned short recover;		/* t2i or tK */

	unsigned short dmack_hold;	/* tj */

	unsigned short cycle;		/* t0 */

	unsigned short udma;		/* t2CYCTYP/2 */

};

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