Commit 3a8691f5 authored by Michal Simek's avatar Michal Simek
Browse files

ARM64: zynqmp: Add CANs node for platform 



Also enable can0 for ep108.

Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent b72b44b6

arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts

+4 −0
Original line number Original line Diff line number Diff line
@@ -32,6 +32,10 @@ 
	};

	};

};

};





&can0 {

	status = "okay";

};



&gem0 {

&gem0 {

	status = "okay";

	status = "okay";

	phy-handle = <&phy0>;

	phy-handle = <&phy0>;

arch/arm64/boot/dts/xilinx/zynqmp.dtsi

+24 −0
Original line number Original line Diff line number Diff line
@@ -96,6 +96,30 @@ 
		#size-cells = <1>;

		#size-cells = <1>;

		ranges;

		ranges;





		can0: can@ff060000 {

			compatible = "xlnx,zynq-can-1.0";

			status = "disabled";

			clocks = <&misc_clk &misc_clk>;

			clock-names = "can_clk", "pclk";

			reg = <0x0 0xff060000 0x1000>;

			interrupts = <0 23 4>;

			interrupt-parent = <&gic>;

			tx-fifo-depth = <0x40>;

			rx-fifo-depth = <0x40>;

		};



		can1: can@ff070000 {

			compatible = "xlnx,zynq-can-1.0";

			status = "disabled";

			clocks = <&misc_clk &misc_clk>;

			clock-names = "can_clk", "pclk";

			reg = <0x0 0xff070000 0x1000>;

			interrupts = <0 24 4>;

			interrupt-parent = <&gic>;

			tx-fifo-depth = <0x40>;

			rx-fifo-depth = <0x40>;

		};



		misc_clk: misc_clk {

		misc_clk: misc_clk {

			compatible = "fixed-clock";

			compatible = "fixed-clock";

			#clock-cells = <0>;

			#clock-cells = <0>;

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