ARM: 7631/1: mmc: mmci: Add new VE MMCI variant (3a37298a) · Commits · 戴 / test

The Versatile Express IOFPGA as shipped on VECD 5.0 (bitfiles v108/208 and v116/216) contains a modified version of the PL180 MMCI, with PeriphID Configuration value changed to 0x2. This version adds an optional "hardware flow control" feature. When enabled MMC card clock will be automatically disabled when FIFO is about to over/underflow and re-enabled once the host retrieved some data. This makes the controller immune to over/underrun errors caused by big interrupt handling latencies. This patch adds relevant device variant in the driver. Signed-off-by:

Pawel Moll <pawel.moll@arm.com> Reviewed-by:

Linus Walleij <linus.walleij@linaro.org> Acked-by:

Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:

Russell King <rmk+kernel@arm.linux.org.uk>

drivers/mmc/host/mmci.c

+13 −0

Original line number	Diff line number	Diff line
		@@ -90,6 +90,14 @@ static struct variant_data variant_arm_extended_fifo = {
		.pwrreg_powerup = MCI_PWR_UP,
		};

		static struct variant_data variant_arm_extended_fifo_hwfc = {
		.fifosize = 128 * 4,
		.fifohalfsize = 64 * 4,
		.clkreg_enable = MCI_ARM_HWFCEN,
		.datalength_bits = 16,
		.pwrreg_powerup = MCI_PWR_UP,
		};

		static struct variant_data variant_u300 = {
		.fifosize = 16 * 4,
		.fifohalfsize = 8 * 4,
		@@ -1671,6 +1679,11 @@ static struct amba_id mmci_ids[] = {
		.mask = 0xff0fffff,
		.data = &variant_arm_extended_fifo,
		},
		{
		.id = 0x02041180,
		.mask = 0xff0fffff,
		.data = &variant_arm_extended_fifo_hwfc,
		},
		{
		.id = 0x00041181,
		.mask = 0x000fffff,

drivers/mmc/host/mmci.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -28,6 +28,8 @@
		#define MCI_ST_UX500_NEG_EDGE (1 << 13)
		#define MCI_ST_UX500_HWFCEN (1 << 14)
		#define MCI_ST_UX500_CLK_INV (1 << 15)
		/* Modified PL180 on Versatile Express platform */
		#define MCI_ARM_HWFCEN (1 << 12)

		#define MMCIARGUMENT 0x008
		#define MMCICOMMAND 0x00c

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