Commit 39dbc646 authored by Yuval Bason's avatar Yuval Bason Committed by David S. Miller
Browse files

qed: Add srq core support for RoCE and iWARP 



This patch adds support for configuring SRQ and provides the necessary
APIs for rdma upper layer driver (qedr) to enable the SRQ feature.

Signed-off-by: default avatarMichal Kalderon <michal.kalderon@cavium.com>
Signed-off-by: default avatarAriel Elior <ariel.elior@cavium.com>
Signed-off-by: default avatarYuval Bason <yuval.bason@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7a9ee41b

drivers/net/ethernet/qlogic/qed/qed_cxt.c

+3 −2
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ 
#include "qed_hsi.h"

#include "qed_hw.h"

#include "qed_init_ops.h"

#include "qed_rdma.h"

#include "qed_reg_addr.h"

#include "qed_sriov.h"
@@ -426,7 +427,7 @@ static void qed_cxt_set_srq_count(struct qed_hwfn *p_hwfn, u32 num_srqs) 
	p_mgr->srq_count = num_srqs;

}



static u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn)

u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn)

{

	struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
@@ -2071,7 +2072,7 @@ static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn, 
	u32 num_cons, num_qps, num_srqs;

	enum protocol_type proto;



	num_srqs = min_t(u32, 32 * 1024, p_params->num_srqs);

	num_srqs = min_t(u32, QED_RDMA_MAX_SRQS, p_params->num_srqs);



	if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) {

		DP_NOTICE(p_hwfn,

drivers/net/ethernet/qlogic/qed/qed_cxt.h

+1 −0
Original line number Diff line number Diff line
@@ -235,6 +235,7 @@ u32 qed_cxt_get_proto_tid_count(struct qed_hwfn *p_hwfn, 
				enum protocol_type type);

u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,

				enum protocol_type type);

u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn);

int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto);



#define QED_CTX_WORKING_MEM 0

drivers/net/ethernet/qlogic/qed/qed_hsi.h

+2 −0
Original line number Diff line number Diff line
@@ -9725,6 +9725,8 @@ enum iwarp_eqe_async_opcode { 
	IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED,

	IWARP_EVENT_TYPE_ASYNC_QP_IN_ERROR_STATE,

	IWARP_EVENT_TYPE_ASYNC_CQ_OVERFLOW,

	IWARP_EVENT_TYPE_ASYNC_SRQ_EMPTY,

	IWARP_EVENT_TYPE_ASYNC_SRQ_LIMIT,

	MAX_IWARP_EQE_ASYNC_OPCODE

};

drivers/net/ethernet/qlogic/qed/qed_iwarp.c

+23 −0
Original line number Diff line number Diff line
@@ -271,6 +271,8 @@ int qed_iwarp_create_qp(struct qed_hwfn *p_hwfn, 
	p_ramrod->sq_num_pages = qp->sq_num_pages;

	p_ramrod->rq_num_pages = qp->rq_num_pages;



	p_ramrod->srq_id.srq_idx = cpu_to_le16(qp->srq_id);

	p_ramrod->srq_id.opaque_fid = cpu_to_le16(p_hwfn->hw_info.opaque_fid);

	p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi);

	p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo);
@@ -3004,8 +3006,11 @@ static int qed_iwarp_async_event(struct qed_hwfn *p_hwfn, 
				 union event_ring_data *data,

				 u8 fw_return_code)

{

	struct qed_rdma_events events = p_hwfn->p_rdma_info->events;

	struct regpair *fw_handle = &data->rdma_data.async_handle;

	struct qed_iwarp_ep *ep = NULL;

	u16 srq_offset;

	u16 srq_id;

	u16 cid;



	ep = (struct qed_iwarp_ep *)(uintptr_t)HILO_64(fw_handle->hi,
@@ -3067,6 +3072,24 @@ static int qed_iwarp_async_event(struct qed_hwfn *p_hwfn, 
		qed_iwarp_cid_cleaned(p_hwfn, cid);



		break;

	case IWARP_EVENT_TYPE_ASYNC_SRQ_EMPTY:

		DP_NOTICE(p_hwfn, "IWARP_EVENT_TYPE_ASYNC_SRQ_EMPTY\n");

		srq_offset = p_hwfn->p_rdma_info->srq_id_offset;

		/* FW assigns value that is no greater than u16 */

		srq_id = ((u16)le32_to_cpu(fw_handle->lo)) - srq_offset;

		events.affiliated_event(events.context,

					QED_IWARP_EVENT_SRQ_EMPTY,

					&srq_id);

		break;

	case IWARP_EVENT_TYPE_ASYNC_SRQ_LIMIT:

		DP_NOTICE(p_hwfn, "IWARP_EVENT_TYPE_ASYNC_SRQ_LIMIT\n");

		srq_offset = p_hwfn->p_rdma_info->srq_id_offset;

		/* FW assigns value that is no greater than u16 */

		srq_id = ((u16)le32_to_cpu(fw_handle->lo)) - srq_offset;

		events.affiliated_event(events.context,

					QED_IWARP_EVENT_SRQ_LIMIT,

					&srq_id);

		break;

	case IWARP_EVENT_TYPE_ASYNC_CQ_OVERFLOW:

		DP_NOTICE(p_hwfn, "IWARP_EVENT_TYPE_ASYNC_CQ_OVERFLOW\n");

drivers/net/ethernet/qlogic/qed/qed_main.c

+2 −0
Original line number Diff line number Diff line
@@ -64,6 +64,7 @@ 


#define QED_ROCE_QPS			(8192)

#define QED_ROCE_DPIS			(8)

#define QED_RDMA_SRQS                   QED_ROCE_QPS



static char version[] =

	"QLogic FastLinQ 4xxxx Core Module qed " DRV_MODULE_VERSION "\n";
@@ -922,6 +923,7 @@ static void qed_update_pf_params(struct qed_dev *cdev, 
	if (IS_ENABLED(CONFIG_QED_RDMA)) {

		params->rdma_pf_params.num_qps = QED_ROCE_QPS;

		params->rdma_pf_params.min_dpis = QED_ROCE_DPIS;

		params->rdma_pf_params.num_srqs = QED_RDMA_SRQS;

		/* divide by 3 the MRs to avoid MF ILT overflow */

		params->rdma_pf_params.gl_pi = QED_ROCE_PROTOCOL_INDEX;

	}

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