MIPS: KVM: Add kvm guest support for Loongson-3 (39c1485c) · Commits · 戴 / test

arch/mips/Kconfig

+1 −0

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		@@ -478,6 +478,7 @@ config MACH_LOONGSON64
		select COMMON_CLK
		select USE_OF
		select BUILTIN_DTB
		select PCI_HOST_GENERIC
		help
		This enables the support of Loongson-2/3 family of machines.

arch/mips/boot/dts/loongson/Makefile

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		@@ -3,5 +3,6 @@ dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_ls7a.dtb
		dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb
		dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_8core_rs780e.dtb
		dtb-$(CONFIG_MACH_LOONGSON64) += loongson64g_4core_ls7a.dtb
		dtb-$(CONFIG_MACH_LOONGSON64) += loongson64v_4core_virtio.dtb

		obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts

0 → 100644

+102 −0

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		// SPDX-License-Identifier: GPL-2.0

		#include <dt-bindings/interrupt-controller/irq.h>

		/dts-v1/;
		/ {
		compatible = "loongson,loongson64v-4core-virtio";
		#address-cells = <2>;
		#size-cells = <2>;

		cpuintc: interrupt-controller {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
		};

		package0: bus@1fe00000 {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
		0 0x3ff00000 0 0x3ff00000 0x100000
		0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>;

		liointc: interrupt-controller@3ff01400 {
		compatible = "loongson,liointc-1.0";
		reg = <0 0x3ff01400 0x64>;

		interrupt-controller;
		#interrupt-cells = <2>;

		interrupt-parent = <&cpuintc>;
		interrupts = <2>, <3>;
		interrupt-names = "int0", "int1";

		loongson,parent_int_map = <0x00000001>, /* int0 */
		<0xfffffffe>, /* int1 */
		<0x00000000>, /* int2 */
		<0x00000000>; /* int3 */

		};

		cpu_uart0: serial@1fe001e0 {
		compatible = "ns16550a";
		reg = <0 0x1fe001e0 0x8>;
		clock-frequency = <33000000>;
		interrupt-parent = <&liointc>;
		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
		no-loopback-test;
		};
		};

		bus@10000000 {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
		0 0x40000000 0 0x40000000 0 0x40000000>; /* PCI MEM */

		rtc0: rtc@10081000 {
		compatible = "google,goldfish-rtc";
		reg = <0 0x10081000 0 0x1000>;
		interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-parent = <&liointc>;
		};

		pci@1a000000 {
		compatible = "pci-host-ecam-generic";
		device_type = "pci";
		#address-cells = <3>;
		#size-cells = <2>;
		#interrupt-cells = <1>;

		bus-range = <0x0 0x1f>;
		reg = <0 0x1a000000 0 0x02000000>;

		ranges = <0x01000000 0x0 0x00004000 0x0 0x18004000 0x0 0x0000c000>,
		<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;

		interrupt-map = <
		0x0000 0x0 0x0 0x1 &liointc 0x2 IRQ_TYPE_LEVEL_HIGH
		0x0800 0x0 0x0 0x1 &liointc 0x3 IRQ_TYPE_LEVEL_HIGH
		0x1000 0x0 0x0 0x1 &liointc 0x4 IRQ_TYPE_LEVEL_HIGH
		0x1800 0x0 0x0 0x1 &liointc 0x5 IRQ_TYPE_LEVEL_HIGH
		>;

		interrupt-map-mask = <0x1800 0x0 0x0 0x7>;
		};

		isa {
		compatible = "isa";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges = <1 0 0 0x18000000 0x4000>;
		};
		};

		hypervisor {
		compatible = "linux,kvm";
		};
		};

arch/mips/include/asm/mach-loongson64/boot_param.h

+3 −1

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		@@ -194,7 +194,8 @@ struct boot_params {

		enum loongson_bridge_type {
		LS7A = 1,
		RS780E = 2
		RS780E = 2,
		VIRTUAL = 3
		};

		struct loongson_system_configuration {
		@@ -230,5 +231,6 @@ extern struct loongson_system_configuration loongson_sysconf;
		extern u32 node_id_offset;
		extern void ls7a_early_config(void);
		extern void rs780e_early_config(void);
		extern void virtual_early_config(void);

		#endif

arch/mips/include/asm/mach-loongson64/builtin_dtbs.h

+1 −0

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		@@ -12,4 +12,5 @@ extern u32 __dtb_loongson64c_4core_ls7a_begin[];
		extern u32 __dtb_loongson64c_4core_rs780e_begin[];
		extern u32 __dtb_loongson64c_8core_rs780e_begin[];
		extern u32 __dtb_loongson64g_4core_ls7a_begin[];
		extern u32 __dtb_loongson64v_4core_virtio_begin[];
		#endif

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