Commit 39a5053f authored by Leo Liu's avatar Leo Liu Committed by Alex Deucher
Browse files

drm/amdgpu: add vcn doorbell range function to nbio7.4 (v2)



To setup the aperture for VCN2.5

v2: setup vcn doorbells in vcn2.5 hw_init (Alex)

Signed-off-by: default avatarLeo Liu <leo.liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 08249a3a
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+21 −0
Original line number Diff line number Diff line
@@ -114,6 +114,26 @@ static void nbio_v7_4_sdma_doorbell_range(struct amdgpu_device *adev, int instan
	WREG32(reg, doorbell_range);
}

static void nbio_v7_4_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
					 int doorbell_index)
{
	u32 reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);

	u32 doorbell_range = RREG32(reg);

	if (use_doorbell) {
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       BIF_MMSCH0_DOORBELL_RANGE, OFFSET,
					       doorbell_index);
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8);
	} else
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0);

	WREG32(reg, doorbell_range);
}

static void nbio_v7_4_enable_doorbell_aperture(struct amdgpu_device *adev,
					       bool enable)
{
@@ -292,6 +312,7 @@ const struct amdgpu_nbio_funcs nbio_v7_4_funcs = {
	.hdp_flush = nbio_v7_4_hdp_flush,
	.get_memsize = nbio_v7_4_get_memsize,
	.sdma_doorbell_range = nbio_v7_4_sdma_doorbell_range,
	.vcn_doorbell_range = nbio_v7_4_vcn_doorbell_range,
	.enable_doorbell_aperture = nbio_v7_4_enable_doorbell_aperture,
	.enable_doorbell_selfring_aperture = nbio_v7_4_enable_doorbell_selfring_aperture,
	.ih_doorbell_range = nbio_v7_4_ih_doorbell_range,
+3 −0
Original line number Diff line number Diff line
@@ -205,6 +205,9 @@ static int vcn_v2_5_hw_init(void *handle)
	struct amdgpu_ring *ring = &adev->vcn.ring_dec;
	int i, r;

	adev->nbio_funcs->vcn_doorbell_range(adev, ring->use_doorbell,
		ring->doorbell_index);

	r = amdgpu_ring_test_ring(ring);
	if (r) {
		ring->sched.ready = false;