soc/tegra: fuse: Add Tegra194 support (3979a4c6) · Commits · 戴 / test

drivers/soc/tegra/fuse/fuse-tegra.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -49,6 +49,9 @@ static struct tegra_fuse *fuse = &(struct tegra_fuse) {
		};

		static const struct of_device_id tegra_fuse_match[] = {
		#ifdef CONFIG_ARCH_TEGRA_194_SOC
		{ .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
		#endif
		#ifdef CONFIG_ARCH_TEGRA_186_SOC
		{ .compatible = "nvidia,tegra186-efuse", .data = &tegra186_fuse_soc },
		#endif

+29 −0

Original line number	Diff line number	Diff line
		@@ -320,3 +320,32 @@ const struct tegra_fuse_soc tegra186_fuse_soc = {
		.num_lookups = ARRAY_SIZE(tegra186_fuse_lookups),
		};
		#endif

		#if defined(CONFIG_ARCH_TEGRA_194_SOC)
		static const struct nvmem_cell_lookup tegra194_fuse_lookups[] = {
		{
		.nvmem_name = "fuse",
		.cell_name = "xusb-pad-calibration",
		.dev_id = "3520000.padctl",
		.con_id = "calibration",
		}, {
		.nvmem_name = "fuse",
		.cell_name = "xusb-pad-calibration-ext",
		.dev_id = "3520000.padctl",
		.con_id = "calibration-ext",
		},
		};

		static const struct tegra_fuse_info tegra194_fuse_info = {
		.read = tegra30_fuse_read,
		.size = 0x300,
		.spare = 0x280,
		};

		const struct tegra_fuse_soc tegra194_fuse_soc = {
		.init = tegra30_fuse_init,
		.info = &tegra194_fuse_info,
		.lookups = tegra194_fuse_lookups,
		.num_lookups = ARRAY_SIZE(tegra194_fuse_lookups),
		};
		#endif

+4 −0

Original line number	Diff line number	Diff line
		@@ -108,4 +108,8 @@ extern const struct tegra_fuse_soc tegra210_fuse_soc;
		extern const struct tegra_fuse_soc tegra186_fuse_soc;
		#endif

		#ifdef CONFIG_ARCH_TEGRA_194_SOC
		extern const struct tegra_fuse_soc tegra194_fuse_soc;
		#endif

		#endif

+1 −0

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		@@ -63,6 +63,7 @@ u32 tegra_read_ram_code(void)
		static const struct of_device_id apbmisc_match[] __initconst = {
		{ .compatible = "nvidia,tegra20-apbmisc", },
		{ .compatible = "nvidia,tegra186-misc", },
		{ .compatible = "nvidia,tegra194-misc", },
		{},
		};