Commit 395f2e8f authored by Xi Wang's avatar Xi Wang Committed by Jason Gunthorpe
Browse files

RDMA/hns: Fix the unneeded process when getting a general type of CQE error 

If the hns ROCEE reports a general error CQE (types not specified by the IB
General Specifications), it's no need to change the QP state to error, and
the driver should just skip it.

Fixes: 7c044adc ("RDMA/hns: Simplify the cqe code of poll cq")
Link: https://lore.kernel.org/r/1595932941-40613-8-git-send-email-liweihang@huawei.com


Signed-off-by: default avatarXi Wang <wangxi11@huawei.com>
Signed-off-by: default avatarWeihang Li <liweihang@huawei.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parent 4327bd2c

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+9 −0
Original line number Diff line number Diff line
@@ -3046,6 +3046,7 @@ static void get_cqe_status(struct hns_roce_dev *hr_dev, struct hns_roce_qp *qp, 
		  IB_WC_RETRY_EXC_ERR },

		{ HNS_ROCE_CQE_V2_RNR_RETRY_EXC_ERR, IB_WC_RNR_RETRY_EXC_ERR },

		{ HNS_ROCE_CQE_V2_REMOTE_ABORT_ERR, IB_WC_REM_ABORT_ERR },

		{ HNS_ROCE_CQE_V2_GENERAL_ERR, IB_WC_GENERAL_ERR}

	};



	u32 cqe_status = roce_get_field(cqe->byte_4, V2_CQE_BYTE_4_STATUS_M,
@@ -3067,6 +3068,14 @@ static void get_cqe_status(struct hns_roce_dev *hr_dev, struct hns_roce_qp *qp, 
	print_hex_dump(KERN_ERR, "", DUMP_PREFIX_NONE, 16, 4, cqe,

		       sizeof(*cqe), false);



	/*

	 * For hns ROCEE, GENERAL_ERR is an error type that is not defined in

	 * the standard protocol, the driver must ignore it and needn't to set

	 * the QP to an error state.

	 */

	if (cqe_status == HNS_ROCE_CQE_V2_GENERAL_ERR)

		return;



	/*

	 * Hip08 hardware cannot flush the WQEs in SQ/RQ if the QP state gets

	 * into errored mode. Hence, as a workaround to this hardware

drivers/infiniband/hw/hns/hns_roce_hw_v2.h

+1 −0
Original line number Diff line number Diff line
@@ -214,6 +214,7 @@ enum { 
	HNS_ROCE_CQE_V2_TRANSPORT_RETRY_EXC_ERR		= 0x15,

	HNS_ROCE_CQE_V2_RNR_RETRY_EXC_ERR		= 0x16,

	HNS_ROCE_CQE_V2_REMOTE_ABORT_ERR		= 0x22,

	HNS_ROCE_CQE_V2_GENERAL_ERR			= 0x23,



	HNS_ROCE_V2_CQE_STATUS_MASK			= 0xff,

};

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