Commit 38beb96e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v4.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:
 - Driver fixes for Freescale i.MX7D, Intel, Broadcom 2835
 - One MAINTAINERS entry

* tag 'pinctrl-v4.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  MAINTAINERS: pinctrl: Add maintainers for pinctrl-single
  pinctrl: bcm2835: Fix initial value for direction_output
  pinctrl: intel: fix offset calculation issue of register PAD_OWN
  pinctrl: intel: fix bug of register offset calculation
  pinctrl: freescale: add ZERO_OFFSET_VALID flag for vf610 pinctrl
parents d7d3d841 13cbd906

MAINTAINERS

+8 −0
Original line number Diff line number Diff line
@@ -8380,6 +8380,14 @@ L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) 
S:	Maintained

F:	drivers/pinctrl/samsung/



PIN CONTROLLER - SINGLE

M:	Tony Lindgren <tony@atomide.com>

M:	Haojian Zhuang <haojian.zhuang@linaro.org>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

L:	linux-omap@vger.kernel.org

S:	Maintained

F:	drivers/pinctrl/pinctrl-single.c



PIN CONTROLLER - ST SPEAR

M:	Viresh Kumar <vireshk@kernel.org>

L:	spear-devel@list.st.com

drivers/pinctrl/bcm/pinctrl-bcm2835.c

+7 −6
Original line number Diff line number Diff line
@@ -342,12 +342,6 @@ static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset) 
	return bcm2835_gpio_get_bit(pc, GPLEV0, offset);

}



static int bcm2835_gpio_direction_output(struct gpio_chip *chip,

		unsigned offset, int value)

{

	return pinctrl_gpio_direction_output(chip->base + offset);

}



static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)

{

	struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
@@ -355,6 +349,13 @@ static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 
	bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset);

}



static int bcm2835_gpio_direction_output(struct gpio_chip *chip,

		unsigned offset, int value)

{

	bcm2835_gpio_set(chip, offset, value);

	return pinctrl_gpio_direction_output(chip->base + offset);

}



static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset)

{

	struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);

drivers/pinctrl/freescale/pinctrl-vf610.c

+1 −1
Original line number Diff line number Diff line
@@ -299,7 +299,7 @@ static const struct pinctrl_pin_desc vf610_pinctrl_pads[] = { 
static struct imx_pinctrl_soc_info vf610_pinctrl_info = {

	.pins = vf610_pinctrl_pads,

	.npins = ARRAY_SIZE(vf610_pinctrl_pads),

	.flags = SHARE_MUX_CONF_REG,

	.flags = SHARE_MUX_CONF_REG | ZERO_OFFSET_VALID,

};



static const struct of_device_id vf610_pinctrl_of_match[] = {

drivers/pinctrl/intel/pinctrl-broxton.c

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
		.padcfglock_offset = BXT_PADCFGLOCK,	\

		.hostown_offset = BXT_HOSTSW_OWN,	\

		.ie_offset = BXT_GPI_IE,		\

		.gpp_size = 32,                         \

		.pin_base = (s),			\

		.npins = ((e) - (s) + 1),		\

	}

drivers/pinctrl/intel/pinctrl-intel.c

+20 −21
Original line number Diff line number Diff line
@@ -25,9 +25,6 @@ 


#include "pinctrl-intel.h"



/* Maximum number of pads in each group */

#define NPADS_IN_GPP			24



/* Offset from regs */

#define PADBAR				0x00c

#define GPI_IS				0x100
@@ -37,6 +34,7 @@ 
#define PADOWN_BITS			4

#define PADOWN_SHIFT(p)			((p) % 8 * PADOWN_BITS)

#define PADOWN_MASK(p)			(0xf << PADOWN_SHIFT(p))

#define PADOWN_GPP(p)			((p) / 8)



/* Offset from pad_regs */

#define PADCFG0				0x000
@@ -142,7 +140,7 @@ static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl, unsigned pin, 
static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)

{

	const struct intel_community *community;

	unsigned padno, gpp, gpp_offset, offset;

	unsigned padno, gpp, offset, group;

	void __iomem *padown;



	community = intel_get_community(pctrl, pin);
@@ -152,9 +150,9 @@ static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin) 
		return true;



	padno = pin_to_padno(community, pin);

	gpp = padno / NPADS_IN_GPP;

	gpp_offset = padno % NPADS_IN_GPP;

	offset = community->padown_offset + gpp * 16 + (gpp_offset / 8) * 4;

	group = padno / community->gpp_size;

	gpp = PADOWN_GPP(padno % community->gpp_size);

	offset = community->padown_offset + 0x10 * group + gpp * 4;

	padown = community->regs + offset;



	return !(readl(padown) & PADOWN_MASK(padno));
@@ -173,11 +171,11 @@ static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned pin) 
		return false;



	padno = pin_to_padno(community, pin);

	gpp = padno / NPADS_IN_GPP;

	gpp = padno / community->gpp_size;

	offset = community->hostown_offset + gpp * 4;

	hostown = community->regs + offset;



	return !(readl(hostown) & BIT(padno % NPADS_IN_GPP));

	return !(readl(hostown) & BIT(padno % community->gpp_size));

}



static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin)
@@ -193,7 +191,7 @@ static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin) 
		return false;



	padno = pin_to_padno(community, pin);

	gpp = padno / NPADS_IN_GPP;

	gpp = padno / community->gpp_size;



	/*

	 * If PADCFGLOCK and PADCFGLOCKTX bits are both clear for this pad,
@@ -202,12 +200,12 @@ static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin) 
	 */

	offset = community->padcfglock_offset + gpp * 8;

	value = readl(community->regs + offset);

	if (value & BIT(pin % NPADS_IN_GPP))

	if (value & BIT(pin % community->gpp_size))

		return true;



	offset = community->padcfglock_offset + 4 + gpp * 8;

	value = readl(community->regs + offset);

	if (value & BIT(pin % NPADS_IN_GPP))

	if (value & BIT(pin % community->gpp_size))

		return true;



	return false;
@@ -663,8 +661,8 @@ static void intel_gpio_irq_ack(struct irq_data *d) 
	community = intel_get_community(pctrl, pin);

	if (community) {

		unsigned padno = pin_to_padno(community, pin);

		unsigned gpp_offset = padno % NPADS_IN_GPP;

		unsigned gpp = padno / NPADS_IN_GPP;

		unsigned gpp_offset = padno % community->gpp_size;

		unsigned gpp = padno / community->gpp_size;



		writel(BIT(gpp_offset), community->regs + GPI_IS + gpp * 4);

	}
@@ -685,8 +683,8 @@ static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask) 
	community = intel_get_community(pctrl, pin);

	if (community) {

		unsigned padno = pin_to_padno(community, pin);

		unsigned gpp_offset = padno % NPADS_IN_GPP;

		unsigned gpp = padno / NPADS_IN_GPP;

		unsigned gpp_offset = padno % community->gpp_size;

		unsigned gpp = padno / community->gpp_size;

		void __iomem *reg;

		u32 value;
@@ -780,8 +778,8 @@ static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on) 
		return -EINVAL;



	padno = pin_to_padno(community, pin);

	gpp = padno / NPADS_IN_GPP;

	gpp_offset = padno % NPADS_IN_GPP;

	gpp = padno / community->gpp_size;

	gpp_offset = padno % community->gpp_size;



	/* Clear the existing wake status */

	writel(BIT(gpp_offset), community->regs + GPI_GPE_STS + gpp * 4);
@@ -819,14 +817,14 @@ static irqreturn_t intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl, 
		/* Only interrupts that are enabled */

		pending &= enabled;



		for_each_set_bit(gpp_offset, &pending, NPADS_IN_GPP) {

		for_each_set_bit(gpp_offset, &pending, community->gpp_size) {

			unsigned padno, irq;



			/*

			 * The last group in community can have less pins

			 * than NPADS_IN_GPP.

			 */

			padno = gpp_offset + gpp * NPADS_IN_GPP;

			padno = gpp_offset + gpp * community->gpp_size;

			if (padno >= community->npins)

				break;
@@ -1002,7 +1000,8 @@ int intel_pinctrl_probe(struct platform_device *pdev, 


		community->regs = regs;

		community->pad_regs = regs + padbar;

		community->ngpps = DIV_ROUND_UP(community->npins, NPADS_IN_GPP);

		community->ngpps = DIV_ROUND_UP(community->npins,

						community->gpp_size);

	}



	irq = platform_get_irq(pdev, 0);

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