ARM: mvebu: add suspend/resume DT information for Armada XP GP (389a367a) · Commits · 戴 / test

This commit improves the Armada XP GP Device Tree description to describe the 3 GPIOs that are used to connect the SoC to the PIC micro-controller that we talk to shutdown the SoC when entering suspend to RAM. Signed-off-by:

Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:

Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1416585613-2113-15-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by:

Jason Cooper <jason@lakedaemon.net>

arch/arm/boot/dts/armada-xp-gp.dts

+18 −1

Original line number	Diff line number	Diff line
		@@ -23,6 +23,7 @@
		*/

		/dts-v1/;
		#include <dt-bindings/gpio/gpio.h>
		#include "armada-xp-mv78460.dtsi"

		/ {
		@@ -48,6 +49,14 @@
		<0x00000001 0x00000000 0x00000001 0x00000000>;
		};

		cpus {
		pm_pic {
		ctrl-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>,
		<&gpio0 17 GPIO_ACTIVE_LOW>,
		<&gpio0 18 GPIO_ACTIVE_LOW>;
		};
		};

		soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
		MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
		@@ -115,7 +124,15 @@
		serial@12300 {
		status = "okay";
		};

		pinctrl {
		pinctrl-0 = <&pic_pins>;
		pinctrl-names = "default";
		pic_pins: pic-pins-0 {
		marvell,pins = "mpp16", "mpp17",
		"mpp18";
		marvell,function = "gpio";
		};
		};
		sata@a0000 {
		nr-ports = <2>;
		status = "okay";

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