Commit 385c59c7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2019-01-11' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "Not a huge amount for rc2, assume the usual quiet period, and rc3 will
  be most of it.

  amdgpu:
   - Powerplay fixes
   - Virtual display pinning fixes
   - Golden register updates for Vega
   - Pitch and gem size validation fixes
   - SR-IOV init error fix
   - Pagetables in system RAM disable for some Raven system
   - DP-MST resume fixes

  tc358767 bridge:
   - fix to work with displayport connector"

* tag 'drm-fixes-2019-01-11' of git://anongit.freedesktop.org/drm/drm: (26 commits)
  drm/amdgpu: disable system memory page tables for now
  drm/amdgpu: set WRITE_BURST_LENGTH to 64B to workaround SDMA1 hang
  drm/amdgpu: fix CPDMA hang in PRT mode for VEGA20
  drm/bridge: tc358767: use DP connector if no panel set
  drm/bridge: tc358767: fix output H/V syncs
  drm/bridge: tc358767: reject modes which require too much BW
  drm/bridge: tc358767: fix initial DP0/1_SRCCTRL value
  drm/bridge: tc358767: fix single lane configuration
  drm/bridge: tc358767: add defines for DP1_SRCCTRL & PHY_2LANE
  drm/bridge: tc358767: add bus flags
  drm/dp_mst: Add __must_check to drm_dp_mst_topology_mgr_resume()
  drm/amdgpu: Don't fail resume process if resuming atomic state fails
  drm/amdgpu: Don't ignore rc from drm_dp_mst_topology_mgr_resume()
  drm/amdgpu: validate user GEM object size
  drm/amdgpu: validate user pitch alignment
  drm/amd/powerplay: drop the unnecessary uclk hard min setting
  drm/amd/powerplay: avoid possible buffer overflow
  drm/amd/powerplay: create pp_od_clk_voltage device file under OD support
  drm/amd/powerplay: update OD support flag for SKU with no OD capabilities
  drm/amdgpu: make gfx9 enter into rlc safe mode when set MGCG
  ...
parents de6629eb f34c48e0

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+6 −6
Original line number Diff line number Diff line
@@ -1701,8 +1701,10 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev) 
		amdgpu_xgmi_add_device(adev);

	amdgpu_amdkfd_device_init(adev);



	if (amdgpu_sriov_vf(adev))

	if (amdgpu_sriov_vf(adev)) {

		amdgpu_virt_init_data_exchange(adev);

		amdgpu_virt_release_full_gpu(adev, true);

	}



	return 0;

}
@@ -2632,9 +2634,6 @@ fence_driver_init: 
		goto failed;

	}



	if (amdgpu_sriov_vf(adev))

		amdgpu_virt_init_data_exchange(adev);



	amdgpu_fbdev_init(adev);



	r = amdgpu_pm_sysfs_init(adev);
@@ -2798,7 +2797,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon) 
			struct drm_framebuffer *fb = crtc->primary->fb;

			struct amdgpu_bo *robj;



			if (amdgpu_crtc->cursor_bo) {

			if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) {

				struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo);

				r = amdgpu_bo_reserve(aobj, true);

				if (r == 0) {
@@ -2906,7 +2905,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon) 
		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {

			struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);



			if (amdgpu_crtc->cursor_bo) {

			if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) {

				struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo);

				r = amdgpu_bo_reserve(aobj, true);

				if (r == 0) {
@@ -3226,6 +3225,7 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device *adev, 
	r = amdgpu_ib_ring_tests(adev);



error:

	amdgpu_virt_init_data_exchange(adev);

	amdgpu_virt_release_full_gpu(adev, true);

	if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {

		atomic_inc(&adev->vram_lost_counter);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

+30 −8
Original line number Diff line number Diff line
@@ -188,11 +188,13 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc, 
		goto cleanup;

	}



	if (!adev->enable_virtual_display) {

		r = amdgpu_bo_pin(new_abo, amdgpu_display_supported_domains(adev));

		if (unlikely(r != 0)) {

			DRM_ERROR("failed to pin new abo buffer before flip\n");

			goto unreserve;

		}

	}



	r = amdgpu_ttm_alloc_gart(&new_abo->tbo);

	if (unlikely(r != 0)) {
@@ -211,6 +213,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc, 
	amdgpu_bo_get_tiling_flags(new_abo, &tiling_flags);

	amdgpu_bo_unreserve(new_abo);



	if (!adev->enable_virtual_display)

		work->base = amdgpu_bo_gpu_offset(new_abo);

	work->target_vblank = target - (uint32_t)drm_crtc_vblank_count(crtc) +

		amdgpu_get_vblank_counter_kms(dev, work->crtc_id);
@@ -242,9 +245,10 @@ pflip_cleanup: 
		goto cleanup;

	}

unpin:

	if (unlikely(amdgpu_bo_unpin(new_abo) != 0)) {

	if (!adev->enable_virtual_display)

		if (unlikely(amdgpu_bo_unpin(new_abo) != 0))

			DRM_ERROR("failed to unpin new abo in error path\n");

	}



unreserve:

	amdgpu_bo_unreserve(new_abo);
@@ -527,6 +531,17 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev, 
	struct drm_gem_object *obj;

	struct amdgpu_framebuffer *amdgpu_fb;

	int ret;

	int height;

	struct amdgpu_device *adev = dev->dev_private;

	int cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0);

	int pitch = mode_cmd->pitches[0] / cpp;



	pitch = amdgpu_align_pitch(adev, pitch, cpp, false);

	if (mode_cmd->pitches[0] != pitch) {

		DRM_DEBUG_KMS("Invalid pitch: expecting %d but got %d\n",

			      pitch, mode_cmd->pitches[0]);

		return ERR_PTR(-EINVAL);

	}



	obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);

	if (obj ==  NULL) {
@@ -541,6 +556,13 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev, 
		return ERR_PTR(-EINVAL);

	}



	height = ALIGN(mode_cmd->height, 8);

	if (obj->size < pitch * height) {

		DRM_DEBUG_KMS("Invalid GEM size: expecting >= %d but got %zu\n",

			      pitch * height, obj->size);

		return ERR_PTR(-EINVAL);

	}



	amdgpu_fb = kzalloc(sizeof(*amdgpu_fb), GFP_KERNEL);

	if (amdgpu_fb == NULL) {

		drm_gem_object_put_unlocked(obj);

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

+14 −8
Original line number Diff line number Diff line
@@ -2008,6 +2008,7 @@ void amdgpu_pm_print_power_states(struct amdgpu_device *adev) 


int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)

{

	struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;

	int ret;



	if (adev->pm.sysfs_initialized)
@@ -2091,6 +2092,7 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) 
				"pp_power_profile_mode\n");

		return ret;

	}

	if (hwmgr->od_enabled) {

		ret = device_create_file(adev->dev,

				&dev_attr_pp_od_clk_voltage);

		if (ret) {
@@ -2098,6 +2100,7 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) 
					"pp_od_clk_voltage\n");

			return ret;

		}

	}

	ret = device_create_file(adev->dev,

			&dev_attr_gpu_busy_percent);

	if (ret) {
@@ -2118,6 +2121,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) 


void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev)

{

	struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;



	if (adev->pm.dpm_enabled == 0)

		return;
@@ -2138,6 +2143,7 @@ void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev) 
	device_remove_file(adev->dev, &dev_attr_pp_mclk_od);

	device_remove_file(adev->dev,

			&dev_attr_pp_power_profile_mode);

	if (hwmgr->od_enabled)

		device_remove_file(adev->dev,

				&dev_attr_pp_od_clk_voltage);

	device_remove_file(adev->dev, &dev_attr_gpu_busy_percent);

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+0 −3
Original line number Diff line number Diff line
@@ -847,9 +847,6 @@ static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm, 
	bp->size = amdgpu_vm_bo_size(adev, level);

	bp->byte_align = AMDGPU_GPU_PAGE_SIZE;

	bp->domain = AMDGPU_GEM_DOMAIN_VRAM;

	if (bp->size <= PAGE_SIZE && adev->asic_type >= CHIP_VEGA10 &&

	    adev->flags & AMD_IS_APU)

		bp->domain |= AMDGPU_GEM_DOMAIN_GTT;

	bp->domain = amdgpu_bo_get_preferred_pin_domain(adev, bp->domain);

	bp->flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |

		AMDGPU_GEM_CREATE_CPU_GTT_USWC;

drivers/gpu/drm/amd/amdgpu/dce_virtual.c

+3 −14
Original line number Diff line number Diff line
@@ -167,19 +167,6 @@ static void dce_virtual_crtc_disable(struct drm_crtc *crtc) 
	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);



	dce_virtual_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);

	if (crtc->primary->fb) {

		int r;

		struct amdgpu_bo *abo;



		abo = gem_to_amdgpu_bo(crtc->primary->fb->obj[0]);

		r = amdgpu_bo_reserve(abo, true);

		if (unlikely(r))

			DRM_ERROR("failed to reserve abo before unpin\n");

		else {

			amdgpu_bo_unpin(abo);

			amdgpu_bo_unreserve(abo);

		}

	}



	amdgpu_crtc->pll_id = ATOM_PPLL_INVALID;

	amdgpu_crtc->encoder = NULL;
@@ -692,7 +679,9 @@ static int dce_virtual_pageflip(struct amdgpu_device *adev, 
	spin_unlock_irqrestore(&adev->ddev->event_lock, flags);



	drm_crtc_vblank_put(&amdgpu_crtc->base);

	schedule_work(&works->unpin_work);

	amdgpu_bo_unref(&works->old_abo);

	kfree(works->shared);

	kfree(works);



	return 0;

}

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