Commit 3856a28c authored by Richard Weinberger's avatar Richard Weinberger
Browse files

Merge tag 'nand/for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next 

NAND core changes:
* Use the new generic ECC object
* Create helpers to set/extract the ECC requirements
* Create a helper to extract the ECC configuration
* Add a NAND page I/O request type
* Introduce the ECC engine framework

Raw NAND core changes:
* Don't overwrite the error code from nand_set_ecc_soft_ops()
* Introduce nand_set_ecc_on_host_ops()
* Use the NAND framework user_conf object for ECC flags
* Use the ECC framework user input parsing bits
* Use the ECC framework nand_ecc_is_strong_enough() helper
* Use the ECC framework OOB layouts
* Make use of the ECC framework
* Use nanddev_get/set_ecc_requirements() when relevant
* Use the new ECC engine type enumeration
* Separate the ECC engine type and the ECC byte placement
* Move the nand_ecc_algo enum to the generic NAND layer
* Rename the ECC algorithm enumeration items
* Add a kernel doc to the ECC algorithm enumeration
* DT bindings:
  - Document boolean NAND ECC properties
  - Document nand-ecc-engine
  - Document nand-ecc-placement

Raw NAND drivers changes:
* Ams-Delta: Fix non-OF build warning
* Atmel:
  - Check return values for nand_read_data_op
  - Simplify with dev_err_probe()
  - Get rid of the legacy interface implementation
  - Convert the driver to exec_op()
  - Use nand_prog_page_end_op()
  - Use nand_{write,read}_data_op()
  - Drop redundant nand_read_page_op()
  - Enable the NFC controller at probe time
  - Disable clk on error handling path in probe
* Cadence: remove a redundant dev_err call
* Gpmi:
  - Simplify with dev_err_probe()
* Marvell:
  - Fix and update kerneldoc
  - Simplify with dev_err_probe()
  - Fix and update kerneldoc
  - Simplify with dev_err_probe()
  - Support panic_write for mtdoops
* Onenand:
  - Simplify the return expression of onenand_transfer_auto_oob
  - Simplify with dev_err_probe()
* Oxnas: cleanup/simplify code
* Pasemi: Make pasemi_device_ready() static
* Qcom: Simplify with dev_err_probe()
* Stm32_fmc2: fix a buffer overflow
* Vf610: Remove unused function vf610_nfc_transfer_size()

SPI-NAND changes:
* Use nanddev_get_ecc_conf() when relevant
* Gigadevice:
  - Add support for GD5F4GQ4xC
  - Add QE Bit
  - Use only one dummy byte in QUADIO
* Macronix:
  - Add support for MX31UF1GE4BC
  - Add support for MX31LF1GE4BC
parents b597cc75 88e315d1

Documentation/devicetree/bindings/mtd/nand-controller.yaml

+31 −0
Original line number Diff line number Diff line
@@ -55,6 +55,37 @@ patternProperties: 
        $ref: /schemas/types.yaml#/definitions/string

        enum: [none, soft, hw, hw_syndrome, hw_oob_first, on-die]



      nand-ecc-engine:

        allOf:

          - $ref: /schemas/types.yaml#/definitions/phandle

        description: |

          A phandle on the hardware ECC engine if any. There are

          basically three possibilities:

          1/ The ECC engine is part of the NAND controller, in this

          case the phandle should reference the parent node.

          2/ The ECC engine is part of the NAND part (on-die), in this

          case the phandle should reference the node itself.

          3/ The ECC engine is external, in this case the phandle should

          reference the specific ECC engine node.



      nand-use-soft-ecc-engine:

        type: boolean

        description: Use a software ECC engine.



      nand-no-ecc-engine:

        type: boolean

        description: Do not use any ECC correction.



      nand-ecc-placement:

        allOf:

          - $ref: /schemas/types.yaml#/definitions/string

          - enum: [ oob, interleaved ]

        description:

          Location of the ECC bytes. This location is unknown by default

          but can be explicitly set to "oob", if all ECC bytes are

          known to be stored in the OOB area, or "interleaved" if ECC

          bytes will be interleaved with regular data in the main area.



      nand-ecc-algo:

        description:

          Desired ECC algorithm.

arch/arm/mach-davinci/board-da830-evm.c

+1 −1
Original line number Diff line number Diff line
@@ -306,7 +306,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = { 
	.core_chipsel	= 1,

	.parts		= da830_evm_nand_partitions,

	.nr_parts	= ARRAY_SIZE(da830_evm_nand_partitions),

	.ecc_mode	= NAND_ECC_HW,

	.engine_type	= NAND_ECC_ENGINE_TYPE_ON_HOST,

	.ecc_bits	= 4,

	.bbt_options	= NAND_BBT_USE_FLASH,

	.bbt_td		= &da830_evm_nand_bbt_main_descr,

arch/arm/mach-davinci/board-da850-evm.c

+1 −1
Original line number Diff line number Diff line
@@ -239,7 +239,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = { 
	.core_chipsel	= 1,

	.parts		= da850_evm_nandflash_partition,

	.nr_parts	= ARRAY_SIZE(da850_evm_nandflash_partition),

	.ecc_mode	= NAND_ECC_HW,

	.engine_type	= NAND_ECC_ENGINE_TYPE_ON_HOST,

	.ecc_bits	= 4,

	.bbt_options	= NAND_BBT_USE_FLASH,

	.timing		= &da850_evm_nandflash_timing,

arch/arm/mach-davinci/board-dm355-evm.c

+1 −1
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static struct davinci_nand_pdata davinci_nand_data = { 
	.mask_chipsel		= BIT(14),

	.parts			= davinci_nand_partitions,

	.nr_parts		= ARRAY_SIZE(davinci_nand_partitions),

	.ecc_mode		= NAND_ECC_HW,

	.engine_type		= NAND_ECC_ENGINE_TYPE_ON_HOST,

	.bbt_options		= NAND_BBT_USE_FLASH,

	.ecc_bits		= 4,

};

arch/arm/mach-davinci/board-dm355-leopard.c

+2 −1
Original line number Diff line number Diff line
@@ -76,7 +76,8 @@ static struct davinci_nand_pdata davinci_nand_data = { 
	.mask_chipsel		= BIT(14),

	.parts			= davinci_nand_partitions,

	.nr_parts		= ARRAY_SIZE(davinci_nand_partitions),

	.ecc_mode		= NAND_ECC_HW_SYNDROME,

	.engine_type		= NAND_ECC_ENGINE_TYPE_ON_HOST,

	.ecc_placement		= NAND_ECC_PLACEMENT_INTERLEAVED,

	.ecc_bits		= 4,

	.bbt_options		= NAND_BBT_USE_FLASH,

};

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