Commit 384fdcec authored by Johan Jonker's avatar Johan Jonker Committed by Heiko Stuebner
Browse files

ARM: dts: rockchip: swap clocks and clock-names values for spdif nodes



Current dts files with 'spdif' nodes are manually verified.
In order to automate this process rockchip-spdif.txt
has to be converted to yaml. In the new setup dtbs_check with
rockchip-spdif.yaml expect clocks and clock-names values
in the same order. Fix this for some older Rockchip models.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200312172240.21362-2-jbx6244@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 579f52f6
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+2 −2
Original line number Diff line number Diff line
@@ -184,8 +184,8 @@
		compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
		reg = <0x1011e000 0x2000>;
		#sound-dai-cells = <0>;
		clock-names = "hclk", "mclk";
		clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
		clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
		clock-names = "mclk", "hclk";
		dmas = <&dmac1_s 8>;
		dma-names = "tx";
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+2 −2
Original line number Diff line number Diff line
@@ -954,8 +954,8 @@
		compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
		reg = <0x0 0xff8b0000 0x0 0x10000>;
		#sound-dai-cells = <0>;
		clock-names = "hclk", "mclk";
		clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>;
		clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>;
		clock-names = "mclk", "hclk";
		dmas = <&dmac_bus_s 3>;
		dma-names = "tx";
		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;