Commit 384649e7 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'WoL-fixes-for-DP83822-and-DP83tc811' 



Dan Murphy says:

====================
WoL fixes for DP83822 and DP83tc811

The WoL feature for each device was enabled during boot or when the PHY was
brought up which may be undesired.  These patches disable the WoL in the
config_init.  The disabling and enabling of the WoL is now done though the
set_wol call.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 8f34e53b 6c599044

drivers/net/phy/dp83822.c

+14 −16
Original line number Diff line number Diff line
@@ -137,19 +137,18 @@ static int dp83822_set_wol(struct phy_device *phydev, 
			value &= ~DP83822_WOL_SECURE_ON;

		}



		value |= (DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL |

			  DP83822_WOL_CLR_INDICATION);

		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,

			      value);

		/* Clear any pending WoL interrupt */

		phy_read(phydev, MII_DP83822_MISR2);



		value |= DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL |

			 DP83822_WOL_CLR_INDICATION;



		return phy_write_mmd(phydev, DP83822_DEVADDR,

				     MII_DP83822_WOL_CFG, value);

	} else {

		value = phy_read_mmd(phydev, DP83822_DEVADDR,

				     MII_DP83822_WOL_CFG);

		value &= ~DP83822_WOL_EN;

		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,

			      value);

		return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,

					  MII_DP83822_WOL_CFG, DP83822_WOL_EN);

	}



	return 0;

}



static void dp83822_get_wol(struct phy_device *phydev,
@@ -258,12 +257,11 @@ static int dp83822_config_intr(struct phy_device *phydev) 


static int dp83822_config_init(struct phy_device *phydev)

{

	int value;



	value = DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON | DP83822_WOL_EN;

	int value = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN |

		    DP83822_WOL_SECURE_ON;



	return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,

	      value);

	return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,

				  MII_DP83822_WOL_CFG, value);

}



static int dp83822_phy_reset(struct phy_device *phydev)

drivers/net/phy/dp83tc811.c

+12 −9
Original line number Diff line number Diff line
@@ -139,16 +139,19 @@ static int dp83811_set_wol(struct phy_device *phydev, 
			value &= ~DP83811_WOL_SECURE_ON;

		}



		value |= (DP83811_WOL_EN | DP83811_WOL_INDICATION_SEL |

			  DP83811_WOL_CLR_INDICATION);

		phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,

			      value);

		/* Clear any pending WoL interrupt */

		phy_read(phydev, MII_DP83811_INT_STAT1);



		value |= DP83811_WOL_EN | DP83811_WOL_INDICATION_SEL |

			 DP83811_WOL_CLR_INDICATION;



		return phy_write_mmd(phydev, DP83811_DEVADDR,

				     MII_DP83811_WOL_CFG, value);

	} else {

		phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,

				   DP83811_WOL_EN);

		return phy_clear_bits_mmd(phydev, DP83811_DEVADDR,

					  MII_DP83811_WOL_CFG, DP83811_WOL_EN);

	}



	return 0;

}



static void dp83811_get_wol(struct phy_device *phydev,
@@ -292,7 +295,7 @@ static int dp83811_config_init(struct phy_device *phydev) 


	value = DP83811_WOL_MAGIC_EN | DP83811_WOL_SECURE_ON | DP83811_WOL_EN;



	return phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,

	return phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,

				  value);

}

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