Commit 3814fd77 authored by Oscar Mateo's avatar Oscar Mateo Committed by Rodrigo Vivi
Browse files

drm/i915: Make some RPS functions static 



They are not used anywhere else. Also, fix a small typo in a comment.

No functional changes.

Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Reviewed-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1503532705-3692-1-git-send-email-oscar.mateo@intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/1503532705-3692-1-git-send-email-oscar.mateo@intel.com
parent 3ffff017

drivers/gpu/drm/i915/i915_irq.c

+4 −4
Original line number Diff line number Diff line
@@ -336,7 +336,7 @@ void gen6_mask_pm_irq(struct drm_i915_private *dev_priv, u32 mask) 
	__gen6_mask_pm_irq(dev_priv, mask);

}



void gen6_reset_pm_iir(struct drm_i915_private *dev_priv, u32 reset_mask)

static void gen6_reset_pm_iir(struct drm_i915_private *dev_priv, u32 reset_mask)

{

	i915_reg_t reg = gen6_pm_iir(dev_priv);
@@ -347,7 +347,7 @@ void gen6_reset_pm_iir(struct drm_i915_private *dev_priv, u32 reset_mask) 
	POSTING_READ(reg);

}



void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, u32 enable_mask)

static void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, u32 enable_mask)

{

	lockdep_assert_held(&dev_priv->irq_lock);
@@ -357,7 +357,7 @@ void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, u32 enable_mask) 
	/* unmask_pm_irq provides an implicit barrier (POSTING_READ) */

}



void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, u32 disable_mask)

static void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, u32 disable_mask)

{

	lockdep_assert_held(&dev_priv->irq_lock);
@@ -405,7 +405,7 @@ void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv) 
	synchronize_irq(dev_priv->drm.irq);



	/* Now that we will not be generating any more work, flush any

	 * outsanding tasks. As we are called on the RPS idle path,

	 * outstanding tasks. As we are called on the RPS idle path,

	 * we will reset the GPU to minimum frequencies, so the current

	 * state of the worker can be discarded.

	 */

drivers/gpu/drm/i915/intel_drv.h

+0 −3
Original line number Diff line number Diff line
@@ -1206,11 +1206,8 @@ void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv); 
/* i915_irq.c */

void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);

void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);

void gen6_reset_pm_iir(struct drm_i915_private *dev_priv, u32 mask);

void gen6_mask_pm_irq(struct drm_i915_private *dev_priv, u32 mask);

void gen6_unmask_pm_irq(struct drm_i915_private *dev_priv, u32 mask);

void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);

void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);

void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv);

void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv);

void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv);

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