Commit 3800276a authored by Joe Perches's avatar Joe Perches Committed by John W. Linville
Browse files

ath: Convert ath_print(.., ATH_DBG_FATAL to ath_err



So these errors are always emitted at KERN_ERR level.
Remove ARRAY_SIZE casts, use printf type %zu

Signed-off-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 21a99f93
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+3 −4
Original line number Diff line number Diff line
@@ -35,9 +35,8 @@ static bool ath_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)

	pdata = (struct ath9k_platform_data *) pdev->dev.platform_data;
	if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
		ath_print(common, ATH_DBG_FATAL,
			  "%s: flash read failed, offset %08x "
			  "is out of range\n",
		ath_err(common,
			"%s: flash read failed, offset %08x is out of range\n",
			__func__, off);
		return false;
	}
+4 −8
Original line number Diff line number Diff line
@@ -173,8 +173,7 @@ static int ar5008_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
			channelSel = ((freq - 704) * 2 - 3040) / 10;
			bModeSynth = 1;
		} else {
			ath_print(common, ATH_DBG_FATAL,
				  "Invalid channel %u MHz\n", freq);
			ath_err(common, "Invalid channel %u MHz\n", freq);
			return -EINVAL;
		}

@@ -206,8 +205,7 @@ static int ar5008_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
		channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
		aModeRefSel = ath9k_hw_reverse_bits(1, 2);
	} else {
		ath_print(common, ATH_DBG_FATAL,
			  "Invalid channel %u MHz\n", freq);
		ath_err(common, "Invalid channel %u MHz\n", freq);
		return -EINVAL;
	}

@@ -448,8 +446,7 @@ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
#define ATH_ALLOC_BANK(bank, size) do { \
		bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \
		if (!bank) { \
			ath_print(common, ATH_DBG_FATAL, \
				  "Cannot allocate RF banks\n"); \
			ath_err(common, "Cannot allocate RF banks\n"); \
			return -ENOMEM; \
		} \
	} while (0);
@@ -879,8 +876,7 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,

	/* Write analog registers */
	if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
		ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
			  "ar5416SetRfRegs failed\n");
		ath_err(ath9k_hw_common(ah), "ar5416SetRfRegs failed\n");
		return -EIO;
	}

+3 −3
Original line number Diff line number Diff line
@@ -494,7 +494,7 @@ int ar9002_hw_rf_claim(struct ath_hw *ah)
	case AR_RAD2122_SREV_MAJOR:
		break;
	default:
		ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
		ath_err(ath9k_hw_common(ah),
			"Radio Chip Rev 0x%02X not supported\n",
			val & AR_RADIO_SREV_MAJOR);
		return -EOPNOTSUPP;
+6 −8
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ int ath_beaconq_config(struct ath_softc *sc)
	}

	if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
		ath_print(common, ATH_DBG_FATAL,
		ath_err(common,
			"Unable to update h/w beacon queue parameters\n");
		return 0;
	} else {
@@ -189,8 +189,7 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
		dev_kfree_skb_any(skb);
		bf->bf_mpdu = NULL;
		bf->bf_buf_addr = 0;
		ath_print(common, ATH_DBG_FATAL,
			  "dma_mapping_error on beaconing\n");
		ath_err(common, "dma_mapping_error on beaconing\n");
		return NULL;
	}

@@ -324,8 +323,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
		dev_kfree_skb_any(skb);
		bf->bf_mpdu = NULL;
		bf->bf_buf_addr = 0;
		ath_print(common, ATH_DBG_FATAL,
			  "dma_mapping_error on beacon alloc\n");
		ath_err(common, "dma_mapping_error on beacon alloc\n");
		return -ENOMEM;
	}

@@ -469,8 +467,8 @@ void ath_beacon_tasklet(unsigned long data)
		 * are still pending on the queue.
		 */
		if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
			ath_print(common, ATH_DBG_FATAL,
				"beacon queue %u did not stop?\n", sc->beacon.beaconq);
			ath_err(common, "beacon queue %u did not stop?\n",
				sc->beacon.beaconq);
		}

		/* NB: cabq traffic should already be queued and primed */
+5 −8
Original line number Diff line number Diff line
@@ -69,8 +69,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
	if (!ath9k_hw_use_flash(ah)) {
		if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET,
					 &magic)) {
			ath_print(common, ATH_DBG_FATAL,
				  "Reading Magic # failed\n");
			ath_err(common, "Reading Magic # failed\n");
			return false;
		}

@@ -90,9 +89,8 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
					eepdata++;
				}
			} else {
				ath_print(common, ATH_DBG_FATAL,
					  "Invalid EEPROM Magic. "
					  "endianness mismatch.\n");
				ath_err(common,
					"Invalid EEPROM Magic. endianness mismatch.\n");
				return -EINVAL;
			}
		}
@@ -163,8 +161,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)

	if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER ||
	    ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) {
		ath_print(common, ATH_DBG_FATAL,
			  "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
		ath_err(common, "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
			sum, ah->eep_ops->get_eeprom_ver(ah));
		return -EINVAL;
	}
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