Commit 37f3e009 authored by Masahiro Yamada's avatar Masahiro Yamada
Browse files

ARM: dts: uniphier: add reset-names to NAND controller node 



The Denali NAND controller IP has separate reset control for the
controller core and registers.

Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.

Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 38dbf2de

arch/arm/boot/dts/uniphier-ld4.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -410,7 +410,8 @@ 
			pinctrl-0 = <&pinctrl_nand>;

			clock-names = "nand", "nand_x", "ecc";

			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;

			resets = <&sys_rst 2>;

			reset-names = "nand", "reg";

			resets = <&sys_rst 2>, <&sys_rst 2>;

		};

	};

};

arch/arm/boot/dts/uniphier-pro4.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -600,7 +600,8 @@ 
			pinctrl-0 = <&pinctrl_nand>;

			clock-names = "nand", "nand_x", "ecc";

			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;

			resets = <&sys_rst 2>;

			reset-names = "nand", "reg";

			resets = <&sys_rst 2>, <&sys_rst 2>;

		};

	};

};

arch/arm/boot/dts/uniphier-pro5.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -465,7 +465,8 @@ 
			pinctrl-0 = <&pinctrl_nand>;

			clock-names = "nand", "nand_x", "ecc";

			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;

			resets = <&sys_rst 2>;

			reset-names = "nand", "reg";

			resets = <&sys_rst 2>, <&sys_rst 2>;

		};



		emmc: sdhc@68400000 {

arch/arm/boot/dts/uniphier-pxs2.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -773,7 +773,8 @@ 
			pinctrl-0 = <&pinctrl_nand>;

			clock-names = "nand", "nand_x", "ecc";

			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;

			resets = <&sys_rst 2>;

			reset-names = "nand", "reg";

			resets = <&sys_rst 2>, <&sys_rst 2>;

		};

	};

};

arch/arm/boot/dts/uniphier-sld8.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -414,7 +414,8 @@ 
			pinctrl-0 = <&pinctrl_nand>;

			clock-names = "nand", "nand_x", "ecc";

			clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;

			resets = <&sys_rst 2>;

			reset-names = "nand", "reg";

			resets = <&sys_rst 2>, <&sys_rst 2>;

		};

	};

};

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