Commit 37495fbd authored by Jaehyun Chung's avatar Jaehyun Chung Committed by Alex Deucher
Browse files

drm/amd/display: Add work-around option to skip DCN20 clock updates 



[Why] Auto Overclock Memory fails for some systems that don't support
p-state.

[How] Implement the workaround, and it's corresponding enable flag.

Signed-off-by: default avatarJaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f7f38ffe

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c

+3 −0
Original line number Diff line number Diff line
@@ -198,6 +198,9 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base, 
	bool force_reset = false;

	int i;



	if (dc->work_arounds.skip_clock_update)

		return;



	if (clk_mgr_base->clks.dispclk_khz == 0 ||

		dc->debug.force_clock_mode & 0x1) {

		//this is from resume or boot up, if forced_clock cfg option used, we bypass program dispclk and DPPCLK, but need set them for S3.

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -122,6 +122,7 @@ struct dc_bug_wa { 
	bool no_connect_phy_config;

	bool dedcn20_305_wa;

	struct display_mode_lib alternate_dml;

	bool skip_clock_update;

};

#endif

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