Commit 3738287c authored by Yunsheng Lin's avatar Yunsheng Lin Committed by David S. Miller
Browse files

net: hns3: Fix for waterline not setting correctly 



The HCLGE_RX_PRIV_EN_B is used to tell the firmware whether
to update the specific waterline value, if the is not set,
the firmware will ignore the value.

This patch fixes by setting the HCLGE_RX_PRIV_EN_B even if
the updated value is zero.

Fixes: 46a3df9f ("net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support")
Signed-off-by: default avatarYunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarSalil Mehta <salil.mehta@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6d0ec65c

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+6 −16
Original line number Diff line number Diff line
@@ -1834,8 +1834,6 @@ static int hclge_rx_priv_buf_alloc(struct hclge_dev *hdev, 
	return 0;

}



#define HCLGE_PRIV_ENABLE(a) ((a) > 0 ? 1 : 0)



static int hclge_rx_priv_wl_config(struct hclge_dev *hdev,

				   struct hclge_pkt_buf_alloc *buf_alloc)

{
@@ -1863,13 +1861,11 @@ static int hclge_rx_priv_wl_config(struct hclge_dev *hdev, 
			req->tc_wl[j].high =

				cpu_to_le16(priv->wl.high >> HCLGE_BUF_UNIT_S);

			req->tc_wl[j].high |=

				cpu_to_le16(HCLGE_PRIV_ENABLE(priv->wl.high) <<

					    HCLGE_RX_PRIV_EN_B);

				cpu_to_le16(BIT(HCLGE_RX_PRIV_EN_B));

			req->tc_wl[j].low =

				cpu_to_le16(priv->wl.low >> HCLGE_BUF_UNIT_S);

			req->tc_wl[j].low |=

				cpu_to_le16(HCLGE_PRIV_ENABLE(priv->wl.low) <<

					    HCLGE_RX_PRIV_EN_B);

				 cpu_to_le16(BIT(HCLGE_RX_PRIV_EN_B));

		}

	}
@@ -1911,13 +1907,11 @@ static int hclge_common_thrd_config(struct hclge_dev *hdev, 
			req->com_thrd[j].high =

				cpu_to_le16(tc->high >> HCLGE_BUF_UNIT_S);

			req->com_thrd[j].high |=

				cpu_to_le16(HCLGE_PRIV_ENABLE(tc->high) <<

					    HCLGE_RX_PRIV_EN_B);

				 cpu_to_le16(BIT(HCLGE_RX_PRIV_EN_B));

			req->com_thrd[j].low =

				cpu_to_le16(tc->low >> HCLGE_BUF_UNIT_S);

			req->com_thrd[j].low |=

				cpu_to_le16(HCLGE_PRIV_ENABLE(tc->low) <<

					    HCLGE_RX_PRIV_EN_B);

				 cpu_to_le16(BIT(HCLGE_RX_PRIV_EN_B));

		}

	}
@@ -1943,14 +1937,10 @@ static int hclge_common_wl_config(struct hclge_dev *hdev, 


	req = (struct hclge_rx_com_wl *)desc.data;

	req->com_wl.high = cpu_to_le16(buf->self.high >> HCLGE_BUF_UNIT_S);

	req->com_wl.high |=

		cpu_to_le16(HCLGE_PRIV_ENABLE(buf->self.high) <<

			    HCLGE_RX_PRIV_EN_B);

	req->com_wl.high |=  cpu_to_le16(BIT(HCLGE_RX_PRIV_EN_B));



	req->com_wl.low = cpu_to_le16(buf->self.low >> HCLGE_BUF_UNIT_S);

	req->com_wl.low |=

		cpu_to_le16(HCLGE_PRIV_ENABLE(buf->self.low) <<

			    HCLGE_RX_PRIV_EN_B);

	req->com_wl.low |=  cpu_to_le16(BIT(HCLGE_RX_PRIV_EN_B));



	ret = hclge_cmd_send(&hdev->hw, &desc, 1);

	if (ret) {

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