Commit 371a6c32 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Martin K. Petersen
Browse files

scsi: pmcraid: use generic DMA API 



Switch from the legacy PCI DMA API to the generic DMA API.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent a9b9e3ad

drivers/scsi/pmcraid.c

+36 −43
Original line number Diff line number Diff line
@@ -3514,7 +3514,7 @@ static int pmcraid_build_passthrough_ioadls( 
		return -ENOMEM;

	}



	sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,

	sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev,

					sglist->scatterlist,

					sglist->num_sg, direction);
@@ -3563,7 +3563,7 @@ static void pmcraid_release_passthrough_ioadls( 
	struct pmcraid_sglist *sglist = cmd->sglist;



	if (buflen > 0) {

		pci_unmap_sg(cmd->drv_inst->pdev,

		dma_unmap_sg(&cmd->drv_inst->pdev->dev,

			     sglist->scatterlist,

			     sglist->num_sg,

			     direction);
@@ -4699,9 +4699,9 @@ static void 
pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)

{

	int i;

	for (i = 0; i < maxindex; i++) {



		pci_free_consistent(pinstance->pdev,

	for (i = 0; i < maxindex; i++) {

		dma_free_coherent(&pinstance->pdev->dev,

				    HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,

				    pinstance->hrrq_start[i],

				    pinstance->hrrq_start_bus_addr[i]);
@@ -4728,11 +4728,9 @@ static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance) 


	for (i = 0; i < pinstance->num_hrrq; i++) {

		pinstance->hrrq_start[i] =

			pci_alloc_consistent(

					pinstance->pdev,

					buffer_size,

					&(pinstance->hrrq_start_bus_addr[i]));



			dma_alloc_coherent(&pinstance->pdev->dev, buffer_size,

					   &pinstance->hrrq_start_bus_addr[i],

					   GFP_KERNEL);

		if (!pinstance->hrrq_start[i]) {

			pmcraid_err("pci_alloc failed for hrrq vector : %d\n",

				    i);
@@ -4761,7 +4759,7 @@ static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance) 
static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)

{

	if (pinstance->ccn.msg != NULL) {

		pci_free_consistent(pinstance->pdev,

		dma_free_coherent(&pinstance->pdev->dev,

				    PMCRAID_AEN_HDR_SIZE +

				    sizeof(struct pmcraid_hcam_ccn_ext),

				    pinstance->ccn.msg,
@@ -4773,7 +4771,7 @@ static void pmcraid_release_hcams(struct pmcraid_instance *pinstance) 
	}



	if (pinstance->ldn.msg != NULL) {

		pci_free_consistent(pinstance->pdev,

		dma_free_coherent(&pinstance->pdev->dev,

				    PMCRAID_AEN_HDR_SIZE +

				    sizeof(struct pmcraid_hcam_ldn),

				    pinstance->ldn.msg,
@@ -4794,17 +4792,15 @@ static void pmcraid_release_hcams(struct pmcraid_instance *pinstance) 
 */

static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)

{

	pinstance->ccn.msg = pci_alloc_consistent(

					pinstance->pdev,

	pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev,

					PMCRAID_AEN_HDR_SIZE +

					sizeof(struct pmcraid_hcam_ccn_ext),

					&(pinstance->ccn.baddr));

					&pinstance->ccn.baddr, GFP_KERNEL);



	pinstance->ldn.msg = pci_alloc_consistent(

					pinstance->pdev,

	pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev,

					PMCRAID_AEN_HDR_SIZE +

					sizeof(struct pmcraid_hcam_ldn),

					&(pinstance->ldn.baddr));

					&pinstance->ldn.baddr, GFP_KERNEL);



	if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {

		pmcraid_release_hcams(pinstance);
@@ -4832,7 +4828,7 @@ static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance) 
{

	if (pinstance->cfg_table != NULL &&

	    pinstance->cfg_table_bus_addr != 0) {

		pci_free_consistent(pinstance->pdev,

		dma_free_coherent(&pinstance->pdev->dev,

				    sizeof(struct pmcraid_config_table),

				    pinstance->cfg_table,

				    pinstance->cfg_table_bus_addr);
@@ -4877,10 +4873,10 @@ static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance) 
		list_add_tail(&pinstance->res_entries[i].queue,

			      &pinstance->free_res_q);



	pinstance->cfg_table =

		pci_alloc_consistent(pinstance->pdev,

	pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev,

				     sizeof(struct pmcraid_config_table),

				     &pinstance->cfg_table_bus_addr);

				     &pinstance->cfg_table_bus_addr,

				     GFP_KERNEL);



	if (NULL == pinstance->cfg_table) {

		pmcraid_err("couldn't alloc DMA memory for config table\n");
@@ -4945,7 +4941,7 @@ static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) 
	pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);



	if (pinstance->inq_data != NULL) {

		pci_free_consistent(pinstance->pdev,

		dma_free_coherent(&pinstance->pdev->dev,

				    sizeof(struct pmcraid_inquiry_data),

				    pinstance->inq_data,

				    pinstance->inq_data_baddr);
@@ -4955,7 +4951,7 @@ static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) 
	}



	if (pinstance->timestamp_data != NULL) {

		pci_free_consistent(pinstance->pdev,

		dma_free_coherent(&pinstance->pdev->dev,

				    sizeof(struct pmcraid_timestamp_data),

				    pinstance->timestamp_data,

				    pinstance->timestamp_data_baddr);
@@ -4972,8 +4968,8 @@ static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) 
 * This routine pre-allocates memory based on the type of block as below:

 * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,

 * IOARCBs(PMCRAID_MAX_CMD)  : DMAable memory, using pci pool allocator

 * config-table entries      : DMAable memory using pci_alloc_consistent

 * HostRRQs                  : DMAable memory, using pci_alloc_consistent

 * config-table entries      : DMAable memory using dma_alloc_coherent

 * HostRRQs                  : DMAable memory, using dma_alloc_coherent

 *

 * Return Value

 *	 0 in case all of the blocks are allocated, -ENOMEM otherwise.
@@ -5010,11 +5006,9 @@ static int pmcraid_init_buffers(struct pmcraid_instance *pinstance) 
	}



	/* allocate DMAable memory for page D0 INQUIRY buffer */

	pinstance->inq_data = pci_alloc_consistent(

					pinstance->pdev,

	pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev,

					sizeof(struct pmcraid_inquiry_data),

					&pinstance->inq_data_baddr);



					&pinstance->inq_data_baddr, GFP_KERNEL);

	if (pinstance->inq_data == NULL) {

		pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");

		pmcraid_release_buffers(pinstance);
@@ -5022,11 +5016,10 @@ static int pmcraid_init_buffers(struct pmcraid_instance *pinstance) 
	}



	/* allocate DMAable memory for set timestamp data buffer */

	pinstance->timestamp_data = pci_alloc_consistent(

					pinstance->pdev,

	pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev,

					sizeof(struct pmcraid_timestamp_data),

					&pinstance->timestamp_data_baddr);



					&pinstance->timestamp_data_baddr,

					GFP_KERNEL);

	if (pinstance->timestamp_data == NULL) {

		pmcraid_err("couldn't allocate DMA memory for \

				set time_stamp \n");
@@ -5315,12 +5308,12 @@ static int pmcraid_resume(struct pci_dev *pdev) 


	pci_set_master(pdev);



	if ((sizeof(dma_addr_t) == 4) ||

	     pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))

		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));

	if (sizeof(dma_addr_t) == 4 ||

	    dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))

		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));



	if (rc == 0)

		rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));

		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));



	if (rc != 0) {

		dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
@@ -5724,19 +5717,19 @@ static int pmcraid_probe(struct pci_dev *pdev, 
	/* Firmware requires the system bus address of IOARCB to be within

	 * 32-bit addressable range though it has 64-bit IOARRIN register.

	 * However, firmware supports 64-bit streaming DMA buffers, whereas

	 * coherent buffers are to be 32-bit. Since pci_alloc_consistent always

	 * coherent buffers are to be 32-bit. Since dma_alloc_coherent always

	 * returns memory within 4GB (if not, change this logic), coherent

	 * buffers are within firmware acceptable address ranges.

	 */

	if ((sizeof(dma_addr_t) == 4) ||

	    pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))

		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));

	if (sizeof(dma_addr_t) == 4 ||

	    dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))

		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));



	/* firmware expects 32-bit DMA addresses for IOARRIN register; set 32

	 * bit mask for pci_alloc_consistent to return addresses within 4GB

	 * bit mask for dma_alloc_coherent to return addresses within 4GB

	 */

	if (rc == 0)

		rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));

		rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));



	if (rc != 0) {

		dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");

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