Commit 3708f89b authored by Jassi Brar's avatar Jassi Brar Committed by Vinod Koul
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dt-bindings: milbeaut-m10v-xdmac: Add Socionext Milbeaut XDMAC bindings



Document the devicetree bindings for Socionext Milbeaut XDMAC
controller. Controller only supports Mem->Mem transfers. Number
of physical channels are determined by the number of irqs registered.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarJassi Brar <jaswinder.singh@linaro.org>
Link: https://lore.kernel.org/r/20191015033157.14656-1-jassisinghbrar@gmail.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 6c3214e6
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* Milbeaut AXI DMA Controller

Milbeaut AXI DMA controller has only memory to memory transfer capability.

* DMA controller

Required property:
- compatible: 	Should be  "socionext,milbeaut-m10v-xdmac"
- reg:		Should contain DMA registers location and length.
- interrupts: 	Should contain all of the per-channel DMA interrupts.
                Number of channels is configurable - 2, 4 or 8, so
                the number of interrupts specified should be {2,4,8}.
- #dma-cells: 	Should be 1.

Example:
	xdmac0: dma-controller@1c250000 {
		compatible = "socionext,milbeaut-m10v-xdmac";
		reg = <0x1c250000 0x1000>;
		interrupts = <0 17 0x4>,
			     <0 18 0x4>,
			     <0 19 0x4>,
			     <0 20 0x4>;
		#dma-cells = <1>;
	};