Commit 37050e3a authored by Thomas Pedersen's avatar Thomas Pedersen Committed by Johannes Berg
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ieee80211: redefine S1G bits with GENMASK 



The S1G capability fields were defined by ORing BITS()
together, and expecting a custom macro to use the _SHIFT
definitions. Use the Linux kernel GENMASK for the
definitions now, and FIELD_{GET,PREP} to access the fields
in the future.

Take the chance to rename eg. S1G_CAPAB_B0 to the more
compact S1G_CAP0.

Signed-off-by: default avatarThomas Pedersen <thomas@adapt-ip.com>
Link: https://lore.kernel.org/r/20200908190323.15814-2-thomas@adapt-ip.com


Signed-off-by: default avatarJohannes Berg <johannes.berg@intel.com>
parent 4b7afb52

include/linux/ieee80211.h

+78 −78
Original line number Diff line number Diff line
@@ -2330,84 +2330,84 @@ ieee80211_he_spr_size(const u8 *he_spr_ie) 
}



/* S1G Capabilities Information field */

#define S1G_CAPAB_B0_S1G_LONG BIT(0)

#define S1G_CAPAB_B0_SGI_1MHZ BIT(1)

#define S1G_CAPAB_B0_SGI_2MHZ BIT(2)

#define S1G_CAPAB_B0_SGI_4MHZ BIT(3)

#define S1G_CAPAB_B0_SGI_8MHZ BIT(4)

#define S1G_CAPAB_B0_SGI_16MHZ BIT(5)

#define S1G_CAPAB_B0_SUPP_CH_WIDTH_MASK (BIT(6) | BIT(7))

#define S1G_CAPAB_B0_SUPP_CH_WIDTH_SHIFT 6



#define S1G_CAPAB_B1_RX_LDPC BIT(0)

#define S1G_CAPAB_B1_TX_STBC BIT(1)

#define S1G_CAPAB_B1_RX_STBC BIT(2)

#define S1G_CAPAB_B1_SU_BFER BIT(3)

#define S1G_CAPAB_B1_SU_BFEE BIT(4)

#define S1G_CAPAB_B1_BFEE_STS_MASK (BIT(5) | BIT(6) | BIT(7))

#define S1G_CAPAB_B1_BFEE_STS_SHIFT 5



#define S1G_CAPAB_B2_SOUNDING_DIMENSIONS_MASK (BIT(0) | BIT(1) | BIT(2))

#define S1G_CAPAB_B2_SOUNDING_DIMENSIONS_SHIFT 0

#define S1G_CAPAB_B2_MU_BFER BIT(3)

#define S1G_CAPAB_B2_MU_BFEE BIT(4)

#define S1G_CAPAB_B2_PLUS_HTC_VHT BIT(5)

#define S1G_CAPAB_B2_TRAVELING_PILOT_MASK (BIT(6) | BIT(7))

#define S1G_CAPAB_B2_TRAVELING_PILOT_SHIFT 6



#define S1G_CAPAB_B3_RD_RESPONDER BIT(0)

#define S1G_CAPAB_B3_HT_DELAYED_BA BIT(1)

#define S1G_CAPAB_B3_MAX_MPDU_LEN BIT(2)

#define S1G_CAPAB_B3_MAX_AMPDU_LEN_EXP_MASK (BIT(3) | BIT(4))

#define S1G_CAPAB_B3_MAX_AMPDU_LEN_EXP_SHIFT 3

#define S1G_CAPAB_B3_MIN_MPDU_START_MASK (BIT(5) | BIT(6) | BIT(7))

#define S1G_CAPAB_B3_MIN_MPDU_START_SHIFT 5



#define S1G_CAPAB_B4_UPLINK_SYNC BIT(0)

#define S1G_CAPAB_B4_DYNAMIC_AID BIT(1)

#define S1G_CAPAB_B4_BAT BIT(2)

#define S1G_CAPAB_B4_TIME_ADE BIT(3)

#define S1G_CAPAB_B4_NON_TIM BIT(4)

#define S1G_CAPAB_B4_GROUP_AID BIT(5)

#define S1G_CAPAB_B4_STA_TYPE_MASK (BIT(6) | BIT(7))

#define S1G_CAPAB_B4_STA_TYPE_SHIFT 6



#define S1G_CAPAB_B5_CENT_AUTH_CONTROL BIT(0)

#define S1G_CAPAB_B5_DIST_AUTH_CONTROL BIT(1)

#define S1G_CAPAB_B5_AMSDU BIT(2)

#define S1G_CAPAB_B5_AMPDU BIT(3)

#define S1G_CAPAB_B5_ASYMMETRIC_BA BIT(4)

#define S1G_CAPAB_B5_FLOW_CONTROL BIT(5)

#define S1G_CAPAB_B5_SECTORIZED_BEAM_MASK (BIT(6) | BIT(7))

#define S1G_CAPAB_B5_SECTORIZED_BEAM_SHIFT 6



#define S1G_CAPAB_B6_OBSS_MITIGATION BIT(0)

#define S1G_CAPAB_B6_FRAGMENT_BA BIT(1)

#define S1G_CAPAB_B6_NDP_PS_POLL BIT(2)

#define S1G_CAPAB_B6_RAW_OPERATION BIT(3)

#define S1G_CAPAB_B6_PAGE_SLICING BIT(4)

#define S1G_CAPAB_B6_TXOP_SHARING_IMP_ACK BIT(5)

#define S1G_CAPAB_B6_VHT_LINK_ADAPT_MASK (BIT(6) | BIT(7))

#define S1G_CAPAB_B6_VHT_LINK_ADAPT_SHIFT 6



#define S1G_CAPAB_B7_TACK_AS_PS_POLL BIT(0)

#define S1G_CAPAB_B7_DUP_1MHZ BIT(1)

#define S1G_CAPAB_B7_MCS_NEGOTIATION BIT(2)

#define S1G_CAPAB_B7_1MHZ_CTL_RESPONSE_PREAMBLE BIT(3)

#define S1G_CAPAB_B7_NDP_BFING_REPORT_POLL BIT(4)

#define S1G_CAPAB_B7_UNSOLICITED_DYN_AID BIT(5)

#define S1G_CAPAB_B7_SECTOR_TRAINING_OPERATION BIT(6)

#define S1G_CAPAB_B7_TEMP_PS_MODE_SWITCH BIT(7)



#define S1G_CAPAB_B8_TWT_GROUPING BIT(0)

#define S1G_CAPAB_B8_BDT BIT(1)

#define S1G_CAPAB_B8_COLOR_MASK (BIT(2) | BIT(3) | BIT(4))

#define S1G_CAPAB_B8_COLOR_SHIFT 2

#define S1G_CAPAB_B8_TWT_REQUEST BIT(5)

#define S1G_CAPAB_B8_TWT_RESPOND BIT(6)

#define S1G_CAPAB_B8_PV1_FRAME BIT(7)



#define S1G_CAPAB_B9_LINK_ADAPT_PER_CONTROL_RESPONSE BIT(0)

#define S1G_CAP0_S1G_LONG	BIT(0)

#define S1G_CAP0_SGI_1MHZ	BIT(1)

#define S1G_CAP0_SGI_2MHZ	BIT(2)

#define S1G_CAP0_SGI_4MHZ	BIT(3)

#define S1G_CAP0_SGI_8MHZ	BIT(4)

#define S1G_CAP0_SGI_16MHZ	BIT(5)

#define S1G_CAP0_SUPP_CH_WIDTH	GENMASK(7, 6)



#define S1G_SUPP_CH_WIDTH_2	0

#define S1G_SUPP_CH_WIDTH_4	1

#define S1G_SUPP_CH_WIDTH_8	2

#define S1G_SUPP_CH_WIDTH_16	3

#define S1G_SUPP_CH_WIDTH_MAX(cap) ((1 << FIELD_GET(S1G_CAP0_SUPP_CH_WIDTH, \

						    cap[0])) << 1)



#define S1G_CAP1_RX_LDPC	BIT(0)

#define S1G_CAP1_TX_STBC	BIT(1)

#define S1G_CAP1_RX_STBC	BIT(2)

#define S1G_CAP1_SU_BFER	BIT(3)

#define S1G_CAP1_SU_BFEE	BIT(4)

#define S1G_CAP1_BFEE_STS	GENMASK(7, 5)



#define S1G_CAP2_SOUNDING_DIMENSIONS	GENMASK(2, 0)

#define S1G_CAP2_MU_BFER		BIT(3)

#define S1G_CAP2_MU_BFEE		BIT(4)

#define S1G_CAP2_PLUS_HTC_VHT		BIT(5)

#define S1G_CAP2_TRAVELING_PILOT	GENMASK(7, 6)



#define S1G_CAP3_RD_RESPONDER		BIT(0)

#define S1G_CAP3_HT_DELAYED_BA		BIT(1)

#define S1G_CAP3_MAX_MPDU_LEN		BIT(2)

#define S1G_CAP3_MAX_AMPDU_LEN_EXP	GENMASK(4, 3)

#define S1G_CAP3_MIN_MPDU_START		GENMASK(7, 5)



#define S1G_CAP4_UPLINK_SYNC	BIT(0)

#define S1G_CAP4_DYNAMIC_AID	BIT(1)

#define S1G_CAP4_BAT		BIT(2)

#define S1G_CAP4_TIME_ADE	BIT(3)

#define S1G_CAP4_NON_TIM	BIT(4)

#define S1G_CAP4_GROUP_AID	BIT(5)

#define S1G_CAP4_STA_TYPE	GENMASK(7, 6)



#define S1G_CAP5_CENT_AUTH_CONTROL	BIT(0)

#define S1G_CAP5_DIST_AUTH_CONTROL	BIT(1)

#define S1G_CAP5_AMSDU			BIT(2)

#define S1G_CAP5_AMPDU			BIT(3)

#define S1G_CAP5_ASYMMETRIC_BA		BIT(4)

#define S1G_CAP5_FLOW_CONTROL		BIT(5)

#define S1G_CAP5_SECTORIZED_BEAM	GENMASK(7, 6)



#define S1G_CAP6_OBSS_MITIGATION	BIT(0)

#define S1G_CAP6_FRAGMENT_BA		BIT(1)

#define S1G_CAP6_NDP_PS_POLL		BIT(2)

#define S1G_CAP6_RAW_OPERATION		BIT(3)

#define S1G_CAP6_PAGE_SLICING		BIT(4)

#define S1G_CAP6_TXOP_SHARING_IMP_ACK	BIT(5)

#define S1G_CAP6_VHT_LINK_ADAPT		GENMASK(7, 6)



#define S1G_CAP7_TACK_AS_PS_POLL		BIT(0)

#define S1G_CAP7_DUP_1MHZ			BIT(1)

#define S1G_CAP7_MCS_NEGOTIATION		BIT(2)

#define S1G_CAP7_1MHZ_CTL_RESPONSE_PREAMBLE	BIT(3)

#define S1G_CAP7_NDP_BFING_REPORT_POLL		BIT(4)

#define S1G_CAP7_UNSOLICITED_DYN_AID		BIT(5)

#define S1G_CAP7_SECTOR_TRAINING_OPERATION	BIT(6)

#define S1G_CAP7_TEMP_PS_MODE_SWITCH		BIT(7)



#define S1G_CAP8_TWT_GROUPING	BIT(0)

#define S1G_CAP8_BDT		BIT(1)

#define S1G_CAP8_COLOR		GENMASK(4, 2)

#define S1G_CAP8_TWT_REQUEST	BIT(5)

#define S1G_CAP8_TWT_RESPOND	BIT(6)

#define S1G_CAP8_PV1_FRAME	BIT(7)



#define S1G_CAP9_LINK_ADAPT_PER_CONTROL_RESPONSE BIT(0)



#define S1G_OPER_CH_WIDTH_PRIMARY_1MHZ	BIT(0)

#define S1G_OPER_CH_WIDTH_OPER		GENMASK(4, 1)



/* Authentication algorithms */

#define WLAN_AUTH_OPEN 0

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