Commit 36d68f64 authored by Stephen Boyd's avatar Stephen Boyd Committed by Stephen Boyd
Browse files

ARM: Add Krait L2 register accessor functions 



Krait CPUs have a handful of L2 cache controller registers that
live behind a cp15 based indirection register. First you program
the indirection register (l2cpselr) to point the L2 'window'
register (l2cpdr) at what you want to read/write.  Then you
read/write the 'window' register to do what you want. The
l2cpselr register is not banked per-cpu so we must lock around
accesses to it to prevent other CPUs from re-pointing l2cpdr
underneath us.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarSricharan R <sricharan@codeaurora.org>
Tested-by: default avatarCraig Tatlor <ctatlor97@gmail.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 5b394b2d

arch/arm/common/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -7,6 +7,9 @@ config DMABOUNCE 
	bool

	select ZONE_DMA



config KRAIT_L2_ACCESSORS

	bool



config SHARP_LOCOMO

	bool

arch/arm/common/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ obj-y += firmware.o 


obj-$(CONFIG_SA1111)		+= sa1111.o

obj-$(CONFIG_DMABOUNCE)		+= dmabounce.o

obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o

obj-$(CONFIG_SHARP_LOCOMO)	+= locomo.o

obj-$(CONFIG_SHARP_PARAM)	+= sharpsl_param.o

obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o

arch/arm/common/krait-l2-accessors.c

0 → 100644
+48 −0
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// SPDX-License-Identifier: GPL-2.0

// Copyright (c) 2018, The Linux Foundation. All rights reserved.



#include <linux/spinlock.h>

#include <linux/export.h>



#include <asm/barrier.h>

#include <asm/krait-l2-accessors.h>



static DEFINE_RAW_SPINLOCK(krait_l2_lock);



void krait_set_l2_indirect_reg(u32 addr, u32 val)

{

	unsigned long flags;



	raw_spin_lock_irqsave(&krait_l2_lock, flags);

	/*

	 * Select the L2 window by poking l2cpselr, then write to the window

	 * via l2cpdr.

	 */

	asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr));

	isb();

	asm volatile ("mcr p15, 3, %0, c15, c0, 7 @ l2cpdr" : : "r" (val));

	isb();



	raw_spin_unlock_irqrestore(&krait_l2_lock, flags);

}

EXPORT_SYMBOL(krait_set_l2_indirect_reg);



u32 krait_get_l2_indirect_reg(u32 addr)

{

	u32 val;

	unsigned long flags;



	raw_spin_lock_irqsave(&krait_l2_lock, flags);

	/*

	 * Select the L2 window by poking l2cpselr, then read from the window

	 * via l2cpdr.

	 */

	asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr));

	isb();

	asm volatile ("mrc p15, 3, %0, c15, c0, 7 @ l2cpdr" : "=r" (val));



	raw_spin_unlock_irqrestore(&krait_l2_lock, flags);



	return val;

}

EXPORT_SYMBOL(krait_get_l2_indirect_reg);

arch/arm/include/asm/krait-l2-accessors.h

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/* SPDX-License-Identifier: GPL-2.0 */



#ifndef __ASMARM_KRAIT_L2_ACCESSORS_H

#define __ASMARM_KRAIT_L2_ACCESSORS_H



extern void krait_set_l2_indirect_reg(u32 addr, u32 val);

extern u32 krait_get_l2_indirect_reg(u32 addr);



#endif

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