Commit 36ad5ae6 authored Sep 02, 2014 by Soren Brinkmann Committed by Michal Simek Sep 16, 2014

ARM: zynq: DT: Add DDRC node



Add the DDR controller to the Zynq devicetree.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

parent c07c8b00

arch/arm/boot/dts/zynq-7000.dtsi

+5 −0

Original line number	Diff line number	Diff line
		@@ -146,6 +146,11 @@
		cache-level = <2>;
		};

		memory-controller@f8006000 {
		compatible = "xlnx,zynq-ddrc-a05";
		reg = <0xf8006000 0x1000>;
		} ;

		uart0: serial@e0000000 {
		compatible = "xlnx,xuartps", "cdns,uart-r1p8";
		status = "disabled";

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