Commit 354935a9 authored Oct 28, 2013 by Stephen Warren

ARM: tegra: fix DEBUG_LL combined with LPAE



The DEBUG_LL UART address is mapped as an MMU section, hence, the
virtual address must be section-aligned. Sections are 1MB without LPAE
and 2MB with LPAE. Tegra's virtual address was only aligned to 1MB, and
hence the mapping was set up incorrectly with LPAE enabled, thus causing
a hang early during boot. Fix this by picking a different virtual address
that is aligned to 2MB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>

parent cdcb5a07

arch/arm/include/debug/tegra.S

+2 −2

Original line number	Diff line number	Diff line
		@@ -46,10 +46,10 @@
		#define TEGRA_APB_MISC_GP_HIDREV (TEGRA_APB_MISC_BASE + 0x804)

		/*
		* Must be 1MB-aligned since a 1MB mapping is used early on.
		* Must be section-aligned since a section mapping is used early on.
		* Must not overlap with regions in mach-tegra/io.c:tegra_io_desc[].
		*/
		#define UART_VIRTUAL_BASE 0xfe100000
		#define UART_VIRTUAL_BASE 0xfe800000

		#define checkuart(rp, rv, lhu, bit, uart) \
		/* Load address of CLK_RST register */ \

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