MIPS: asm: cpu: Add MIPSR6 ISA definitions (34c56fc1) · Commits · 戴 / test

arch/mips/include/asm/cpu-features.h

+15 −4

Original line number	Diff line number	Diff line
		@@ -189,12 +189,18 @@
		#ifndef cpu_has_mips32r2
		# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
		#endif
		#ifndef cpu_has_mips32r6
		# define cpu_has_mips32r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R6)
		#endif
		#ifndef cpu_has_mips64r1
		# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
		#endif
		#ifndef cpu_has_mips64r2
		# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
		#endif
		#ifndef cpu_has_mips64r6
		# define cpu_has_mips64r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R6)
		#endif

		/*
		* Shortcuts ...
		@@ -210,15 +216,20 @@

		#define cpu_has_mips_4_5_r2 (cpu_has_mips_4_5 \| cpu_has_mips_r2)

		#define cpu_has_mips32 (cpu_has_mips32r1 \| cpu_has_mips32r2)
		#define cpu_has_mips64 (cpu_has_mips64r1 \| cpu_has_mips64r2)
		#define cpu_has_mips32 (cpu_has_mips32r1 \| cpu_has_mips32r2 \| cpu_has_mips32r6)
		#define cpu_has_mips64 (cpu_has_mips64r1 \| cpu_has_mips64r2 \| cpu_has_mips64r6)
		#define cpu_has_mips_r1 (cpu_has_mips32r1 \| cpu_has_mips64r1)
		#define cpu_has_mips_r2 (cpu_has_mips32r2 \| cpu_has_mips64r2)
		#define cpu_has_mips_r6 (cpu_has_mips32r6 \| cpu_has_mips64r6)
		#define cpu_has_mips_r (cpu_has_mips32r1 \| cpu_has_mips32r2 \| \
		cpu_has_mips64r1 \| cpu_has_mips64r2)
		cpu_has_mips32r6 \| cpu_has_mips64r1 \| \
		cpu_has_mips64r2 \| cpu_has_mips64r6)

		/* MIPSR2 and MIPSR6 have a lot of similarities */
		#define cpu_has_mips_r2_r6 (cpu_has_mips_r2 \| cpu_has_mips_r6)

		#ifndef cpu_has_mips_r2_exec_hazard
		#define cpu_has_mips_r2_exec_hazard cpu_has_mips_r2
		#define cpu_has_mips_r2_exec_hazard (cpu_has_mips_r2 \| cpu_has_mips_r6)
		#endif

		/*

arch/mips/include/asm/cpu.h

+5 −2

Original line number	Diff line number	Diff line
		@@ -332,11 +332,14 @@ enum cpu_type_enum {
		#define MIPS_CPU_ISA_M32R2 0x00000020
		#define MIPS_CPU_ISA_M64R1 0x00000040
		#define MIPS_CPU_ISA_M64R2 0x00000080
		#define MIPS_CPU_ISA_M32R6 0x00000100
		#define MIPS_CPU_ISA_M64R6 0x00000200

		#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_II \| MIPS_CPU_ISA_M32R1 \| \
		MIPS_CPU_ISA_M32R2)
		MIPS_CPU_ISA_M32R2 \| MIPS_CPU_ISA_M32R6)
		#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III \| MIPS_CPU_ISA_IV \| \
		MIPS_CPU_ISA_V \| MIPS_CPU_ISA_M64R1 \| MIPS_CPU_ISA_M64R2)
		MIPS_CPU_ISA_V \| MIPS_CPU_ISA_M64R1 \| MIPS_CPU_ISA_M64R2 \| \
		MIPS_CPU_ISA_M64R6)

		/*
		* CPU Option encodings

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