Commit 34904bd6 authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by Chris Wilson
Browse files

drm/i915/debugfs: move uC printers and update debugfs file names 



Move the printers to the respective files for clarity. The
guc_load_status debugfs has been squashed in the guc_info one, has
having separate ones wasn't very useful. The HuC debugfs has been
renamed huc_info to match.

v2: keep printing HUC_STATUS2 (Tony), avoid const->non-const
    container_of (Jani)

Suggested-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200326181121.16869-5-daniele.ceraolospurio@intel.com
parent 801a0caa

drivers/gpu/drm/i915/gt/uc/intel_guc.c

+44 −0
Original line number Diff line number Diff line
@@ -723,3 +723,47 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size, 


	return 0;

}



/**

 * intel_guc_load_status - dump information about GuC load status

 * @guc: the GuC

 * @p: the &drm_printer

 *

 * Pretty printer for GuC load status.

 */

void intel_guc_load_status(struct intel_guc *guc, struct drm_printer *p)

{

	struct intel_gt *gt = guc_to_gt(guc);

	struct intel_uncore *uncore = gt->uncore;

	intel_wakeref_t wakeref;



	if (!intel_guc_is_supported(guc)) {

		drm_printf(p, "GuC not supported\n");

		return;

	}



	if (!intel_guc_is_wanted(guc)) {

		drm_printf(p, "GuC disabled\n");

		return;

	}



	intel_uc_fw_dump(&guc->fw, p);



	with_intel_runtime_pm(uncore->rpm, wakeref) {

		u32 status = intel_uncore_read(uncore, GUC_STATUS);

		u32 i;



		drm_printf(p, "\nGuC status 0x%08x:\n", status);

		drm_printf(p, "\tBootrom status = 0x%x\n",

			   (status & GS_BOOTROM_MASK) >> GS_BOOTROM_SHIFT);

		drm_printf(p, "\tuKernel status = 0x%x\n",

			   (status & GS_UKERNEL_MASK) >> GS_UKERNEL_SHIFT);

		drm_printf(p, "\tMIA Core status = 0x%x\n",

			   (status & GS_MIA_MASK) >> GS_MIA_SHIFT);

		drm_puts(p, "\nScratch registers:\n");

		for (i = 0; i < 16; i++) {

			drm_printf(p, "\t%2d: \t0x%x\n",

				   i, intel_uncore_read(uncore, SOFT_SCRATCH(i)));

		}

	}

}

drivers/gpu/drm/i915/gt/uc/intel_guc.h

+2 −0
Original line number Diff line number Diff line
@@ -190,4 +190,6 @@ static inline void intel_guc_disable_msg(struct intel_guc *guc, u32 mask) 
int intel_guc_reset_engine(struct intel_guc *guc,

			   struct intel_engine_cs *engine);



void intel_guc_load_status(struct intel_guc *guc, struct drm_printer *p);



#endif

drivers/gpu/drm/i915/gt/uc/intel_guc_log.c

+92 −0
Original line number Diff line number Diff line
@@ -672,3 +672,95 @@ void intel_guc_log_handle_flush_event(struct intel_guc_log *log) 
{

	queue_work(system_highpri_wq, &log->relay.flush_work);

}



static const char *

stringify_guc_log_type(enum guc_log_buffer_type type)

{

	switch (type) {

	case GUC_ISR_LOG_BUFFER:

		return "ISR";

	case GUC_DPC_LOG_BUFFER:

		return "DPC";

	case GUC_CRASH_DUMP_LOG_BUFFER:

		return "CRASH";

	default:

		MISSING_CASE(type);

	}



	return "";

}



/**

 * intel_guc_log_info - dump information about GuC log relay

 * @guc: the GuC

 * @p: the &drm_printer

 *

 * Pretty printer for GuC log info

 */

void intel_guc_log_info(struct intel_guc_log *log, struct drm_printer *p)

{

	enum guc_log_buffer_type type;



	if (!intel_guc_log_relay_created(log)) {

		drm_puts(p, "GuC log relay not created\n");

		return;

	}



	drm_puts(p, "GuC logging stats:\n");



	drm_printf(p, "\tRelay full count: %u\n", log->relay.full_count);



	for (type = GUC_ISR_LOG_BUFFER; type < GUC_MAX_LOG_BUFFER; type++) {

		drm_printf(p, "\t%s:\tflush count %10u, overflow count %10u\n",

			   stringify_guc_log_type(type),

			   log->stats[type].flush,

			   log->stats[type].sampled_overflow);

	}

}



/**

 * intel_guc_log_dump - dump the contents of the GuC log

 * @log: the GuC log

 * @p: the &drm_printer

 * @dump_load_err: dump the log saved on GuC load error

 *

 * Pretty printer for the GuC log

 */

int intel_guc_log_dump(struct intel_guc_log *log, struct drm_printer *p,

		       bool dump_load_err)

{

	struct intel_guc *guc = log_to_guc(log);

	struct intel_uc *uc = container_of(guc, struct intel_uc, guc);

	struct drm_i915_gem_object *obj = NULL;

	u32 *map;

	int i = 0;



	if (!intel_guc_is_supported(guc))

		return -ENODEV;



	if (dump_load_err)

		obj = uc->load_err_log;

	else if (guc->log.vma)

		obj = guc->log.vma->obj;



	if (!obj)

		return 0;



	map = i915_gem_object_pin_map(obj, I915_MAP_WC);

	if (IS_ERR(map)) {

		DRM_DEBUG("Failed to pin object\n");

		drm_puts(p, "(log data unaccessible)\n");

		return PTR_ERR(map);

	}



	for (i = 0; i < obj->base.size / sizeof(u32); i += 4)

		drm_printf(p, "0x%08x 0x%08x 0x%08x 0x%08x\n",

			   *(map + i), *(map + i + 1),

			   *(map + i + 2), *(map + i + 3));



	drm_puts(p, "\n");



	i915_gem_object_unpin_map(obj);



	return 0;

}

drivers/gpu/drm/i915/gt/uc/intel_guc_log.h

+4 −0
Original line number Diff line number Diff line
@@ -79,4 +79,8 @@ static inline u32 intel_guc_log_get_level(struct intel_guc_log *log) 
	return log->level;

}



void intel_guc_log_info(struct intel_guc_log *log, struct drm_printer *p);

int intel_guc_log_dump(struct intel_guc_log *log, struct drm_printer *p,

		       bool dump_load_err);



#endif

drivers/gpu/drm/i915/gt/uc/intel_huc.c

+29 −0
Original line number Diff line number Diff line
@@ -218,3 +218,32 @@ int intel_huc_check_status(struct intel_huc *huc) 


	return (status & huc->status.mask) == huc->status.value;

}



/**

 * intel_huc_load_status - dump information about HuC load status

 * @huc: the HuC

 * @p: the &drm_printer

 *

 * Pretty printer for HuC load status.

 */

void intel_huc_load_status(struct intel_huc *huc, struct drm_printer *p)

{

	struct intel_gt *gt = huc_to_gt(huc);

	intel_wakeref_t wakeref;



	if (!intel_huc_is_supported(huc)) {

		drm_printf(p, "HuC not supported\n");

		return;

	}



	if (!intel_huc_is_wanted(huc)) {

		drm_printf(p, "HuC disabled\n");

		return;

	}



	intel_uc_fw_dump(&huc->fw, p);



	with_intel_runtime_pm(gt->uncore->rpm, wakeref)

		drm_printf(p, "\nHuC status 0x%08x:\n",

			   intel_uncore_read(gt->uncore, HUC_STATUS2));

}

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