iio: ad7949: fix incorrect SPI xfer len (348eb0b2) · Commits · 戴 / test

This driver supports 14-bits and 16-bits devices. All of them have a 14-bit configuration registers. All SPI trasfers, for reading AD conversion results and for writing the configuration register, fit in two bytes. The driver always uses 4-bytes xfers which seems at least pointless (maybe even harmful). This patch trims the SPI xfer len and the buffer size to two bytes. Signed-off-by:

Andrea Merello <andrea.merello@gmail.com> Reviewed-by:

Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by:

Jonathan Cameron <Jonathan.Cameron@huawei.com>

drivers/iio/adc/ad7949.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -54,7 +54,7 @@ struct ad7949_adc_chip {
		u8 resolution;
		u16 cfg;
		unsigned int current_channel;
		u32 buffer ____cacheline_aligned;
		u16 buffer ____cacheline_aligned;
		};

		static int ad7949_spi_write_cfg(struct ad7949_adc_chip *ad7949_adc, u16 val,
		@@ -67,7 +67,7 @@ static int ad7949_spi_write_cfg(struct ad7949_adc_chip *ad7949_adc, u16 val,
		struct spi_transfer tx[] = {
		{
		.tx_buf = &ad7949_adc->buffer,
		.len = 4,
		.len = 2,
		.bits_per_word = bits_per_word,
		},
		};
		@@ -95,7 +95,7 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip ad7949_adc, int val,
		struct spi_transfer tx[] = {
		{
		.rx_buf = &ad7949_adc->buffer,
		.len = 4,
		.len = 2,
		.bits_per_word = bits_per_word,
		},
		};

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