net/mlx5e: Switch ethernet extended counters to use stats group API (3488bd4c) · Commits · 戴 / test

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

+0 −8

Original line number	Diff line number	Diff line
		@@ -216,10 +216,6 @@ static void mlx5e_fill_stats_strings(struct mlx5e_priv priv, u8 data)
		for (i = 0; i < mlx5e_num_stats_grps; i++)
		idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);

		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS(priv); i++)
		strcpy(data + (idx++) * ETH_GSTRING_LEN,
		pport_eth_ext_stats_desc[i].format);

		for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
		strcpy(data + (idx++) * ETH_GSTRING_LEN,
		pcie_perf_stats_desc[i].format);
		@@ -332,10 +328,6 @@ void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
		for (i = 0; i < mlx5e_num_stats_grps; i++)
		idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);

		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS(priv); i++)
		data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters,
		pport_eth_ext_stats_desc, i);

		for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
		data[idx++] = MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
		pcie_perf_stats_desc, i);

drivers/net/ethernet/mellanox/mlx5/core/en_stats.c

+47 −0

Original line number	Diff line number	Diff line
		@@ -373,6 +373,48 @@ static int mlx5e_grp_phy_fill_stats(struct mlx5e_priv priv, u64 data, int idx)
		return idx;
		}

		#define PPORT_ETH_EXT_OFF(c) \
		MLX5_BYTE_OFF(ppcnt_reg, \
		counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
		static const struct counter_desc pport_eth_ext_stats_desc[] = {
		{ "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) },
		};

		#define NUM_PPORT_ETH_EXT_COUNTERS ARRAY_SIZE(pport_eth_ext_stats_desc)

		static int mlx5e_grp_eth_ext_get_num_stats(struct mlx5e_priv *priv)
		{
		if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
		return NUM_PPORT_ETH_EXT_COUNTERS;

		return 0;
		}

		static int mlx5e_grp_eth_ext_fill_strings(struct mlx5e_priv priv, u8 data,
		int idx)
		{
		int i;

		if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++)
		strcpy(data + (idx++) * ETH_GSTRING_LEN,
		pport_eth_ext_stats_desc[i].format);
		return idx;
		}

		static int mlx5e_grp_eth_ext_fill_stats(struct mlx5e_priv priv, u64 data,
		int idx)
		{
		int i;

		if (MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
		for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS; i++)
		data[idx++] =
		MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters,
		pport_eth_ext_stats_desc, i);
		return idx;
		}

		const struct mlx5e_stats_grp mlx5e_stats_grps[] = {
		{
		.get_num_stats = mlx5e_grp_sw_get_num_stats,
		@@ -409,6 +451,11 @@ const struct mlx5e_stats_grp mlx5e_stats_grps[] = {
		.fill_strings = mlx5e_grp_phy_fill_strings,
		.fill_stats = mlx5e_grp_phy_fill_stats,
		},
		{
		.get_num_stats = mlx5e_grp_eth_ext_get_num_stats,
		.fill_strings = mlx5e_grp_eth_ext_fill_strings,
		.fill_stats = mlx5e_grp_eth_ext_fill_stats,
		}
		};

		const int mlx5e_num_stats_grps = ARRAY_SIZE(mlx5e_stats_grps);

drivers/net/ethernet/mellanox/mlx5/core/en_stats.h

+1 −12

Original line number	Diff line number	Diff line
		@@ -121,9 +121,6 @@ struct mlx5e_vport_stats {
		MLX5_GET64(ppcnt_reg, pstats->per_prio_counters[prio], \
		counter_set.eth_per_prio_grp_data_layout.c##_high)
		#define NUM_PPORT_PRIO 8
		#define PPORT_ETH_EXT_OFF(c) \
		MLX5_BYTE_OFF(ppcnt_reg, \
		counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
		#define PPORT_ETH_EXT_GET(pstats, c) \
		MLX5_GET64(ppcnt_reg, (pstats)->eth_ext_counters, \
		counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
		@@ -154,10 +151,6 @@ static const struct counter_desc pport_per_prio_pfc_stats_desc[] = {
		{ "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) },
		};

		static const struct counter_desc pport_eth_ext_stats_desc[] = {
		{ "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) },
		};

		#define PCIE_PERF_OFF(c) \
		MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c)
		#define PCIE_PERF_GET(pcie_stats, c) \
		@@ -289,12 +282,8 @@ static const struct counter_desc sq_stats_desc[] = {
		ARRAY_SIZE(pport_per_prio_traffic_stats_desc)
		#define NUM_PPORT_PER_PRIO_PFC_COUNTERS \
		ARRAY_SIZE(pport_per_prio_pfc_stats_desc)
		#define NUM_PPORT_ETH_EXT_COUNTERS(priv) \
		(ARRAY_SIZE(pport_eth_ext_stats_desc) * \
		MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
		#define NUM_PPORT_COUNTERS(priv) (NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * \
		NUM_PPORT_PRIO + \
		NUM_PPORT_ETH_EXT_COUNTERS(priv))
		NUM_PPORT_PRIO)
		#define NUM_PCIE_COUNTERS(priv) (NUM_PCIE_PERF_COUNTERS(priv) + \
		NUM_PCIE_PERF_COUNTERS64(priv) +\
		NUM_PCIE_PERF_STALL_COUNTERS(priv))

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