parisc: improve ptrace support for gdb single-step (34360f08) · Commits · 戴 / test

Various GCC tests use gdb to simulate a multithreaded application. Many of these tests have been failing on parisc linux. GCC does this by using gdb to single-step the application, then gdb is used to call other test specific code. Where this fails is when the application is stepped into the delay slot of a taken branch. This sets the PSW B bit. When the test specific code is executed, this usually clears the PSW B bit. Currently, gdb is not allowed to set the B bit. So, the code falls through what should be a taken branch. The attached patch adds the PSW B bit to the set of bits that gdb is allowed to set. In order to set the B bit, the trace system call must return using an interrupt restore. The patch also modifies this code to use the saved IAOQ values when they are saved by a ptrace syscall or interruption. Signed-off-by:

John David Anglin <dave.anglin@bell.net> Signed-off-by:

Helge Deller <deller@gmx.de>

arch/parisc/kernel/entry.S

+13 −5

Original line number	Diff line number	Diff line
		@@ -1865,7 +1865,7 @@ syscall_restore:

		/* Are we being ptraced? */
		ldw TASK_FLAGS(%r1),%r19
		ldi (_TIF_SINGLESTEP\|_TIF_BLOCKSTEP),%r2
		ldi _TIF_SYSCALL_TRACE_MASK,%r2
		and,COND(=) %r19,%r2,%r0
		b,n syscall_restore_rfi

		@@ -1978,15 +1978,23 @@ syscall_restore_rfi:
		/* sr2 should be set to zero for userspace syscalls */
		STREG %r0,TASK_PT_SR2(%r1)

		pt_regs_ok:
		LDREG TASK_PT_GR31(%r1),%r2
		depi 3,31,2,%r2 /* ensure return to user mode. */
		STREG %r2,TASK_PT_IAOQ0(%r1)
		ldo 4(%r2),%r2
		STREG %r2,TASK_PT_IAOQ1(%r1)
		b intr_restore
		copy %r25,%r16

		pt_regs_ok:
		LDREG TASK_PT_IAOQ0(%r1),%r2
		depi 3,31,2,%r2 /* ensure return to user mode. */
		STREG %r2,TASK_PT_IAOQ0(%r1)
		LDREG TASK_PT_IAOQ1(%r1),%r2
		depi 3,31,2,%r2
		STREG %r2,TASK_PT_IAOQ1(%r1)
		b intr_restore
		nop
		copy %r25,%r16

		.import schedule,code
		syscall_do_resched:

arch/parisc/kernel/ptrace.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -26,7 +26,7 @@
		#include <asm/asm-offsets.h>

		/* PSW bits we allow the debugger to modify */
		#define USER_PSW_BITS (PSW_N \| PSW_V \| PSW_CB)
		#define USER_PSW_BITS (PSW_N \| PSW_B \| PSW_V \| PSW_CB)

		/*
		* Called by kernel/ptrace.c when detaching..

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