Commit 342061c5 authored by Borislav Petkov's avatar Borislav Petkov Committed by Ingo Molnar
Browse files

x86/msr-index: Move AMD MSRs where they belong 



... sort them in and fixup comment, while at it.

No functional changes.

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20190819070140.23708-1-bp@alien8.de


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent be261ffc

arch/x86/include/asm/msr-index.h

+7 −6
Original line number Diff line number Diff line
@@ -375,13 +375,17 @@ 
/* Alternative perfctr range with full access. */

#define MSR_IA32_PMC0			0x000004c1



/* AMD64 MSRs. Not complete. See the architecture manual for a more

   complete list. */



/*

 * AMD64 MSRs. Not complete. See the architecture manual for a more

 * complete list.

 */

#define MSR_AMD64_PATCH_LEVEL		0x0000008b

#define MSR_AMD64_TSC_RATIO		0xc0000104

#define MSR_AMD64_NB_CFG		0xc001001f

#define MSR_AMD64_PATCH_LOADER		0xc0010020

#define MSR_AMD_PERF_CTL		0xc0010062

#define MSR_AMD_PERF_STATUS		0xc0010063

#define MSR_AMD_PSTATE_DEF_BASE		0xc0010064

#define MSR_AMD64_OSVW_ID_LENGTH	0xc0010140

#define MSR_AMD64_OSVW_STATUS		0xc0010141

#define MSR_AMD64_LS_CFG		0xc0011020
@@ -560,9 +564,6 @@ 
#define MSR_IA32_PERF_STATUS		0x00000198

#define MSR_IA32_PERF_CTL		0x00000199

#define INTEL_PERF_CTL_MASK		0xffff

#define MSR_AMD_PSTATE_DEF_BASE		0xc0010064

#define MSR_AMD_PERF_STATUS		0xc0010063

#define MSR_AMD_PERF_CTL		0xc0010062



#define MSR_IA32_MPERF			0x000000e7

#define MSR_IA32_APERF			0x000000e8

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