Unverified Commit 33b773dc authored by Curtis Malainey's avatar Curtis Malainey Committed by Mark Brown
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ASoC: rt5677: Remove magic number register writes 



In order to simplify understanding what register values are being
written to the codec for debugging more advanced features (such as
hotwording) it is best to remove magic numbers

Signed-off-by: default avatarCurtis Malainey <cujomalainey@chromium.org>
Link: https://lore.kernel.org/r/20190906194636.217881-2-cujomalainey@chromium.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent e8fbd250

sound/soc/codecs/rt5677.c

+11 −5
Original line number Diff line number Diff line
@@ -691,10 +691,12 @@ static void rt5677_set_dsp_mode(struct snd_soc_component *component, bool on) 
	struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component);



	if (on) {

		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x2, 0x2);

		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1,

			RT5677_PWR_DSP, RT5677_PWR_DSP);

		rt5677->is_dsp_mode = true;

	} else {

		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, 0x2, 0x0);

		regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1,

			RT5677_PWR_DSP, 0x0);

		rt5677->is_dsp_mode = false;

	}

}
@@ -4466,7 +4468,8 @@ static int rt5677_set_bias_level(struct snd_soc_component *component, 


			regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1,

				RT5677_LDO1_SEL_MASK | RT5677_LDO2_SEL_MASK,

				0x0055);

				5 << RT5677_LDO1_SEL_SFT |

				5 << RT5677_LDO2_SEL_SFT);

			regmap_update_bits(rt5677->regmap,

				RT5677_PR_BASE + RT5677_BIAS_CUR4,

				0x0f00, 0x0f00);
@@ -4491,7 +4494,9 @@ static int rt5677_set_bias_level(struct snd_soc_component *component, 
		regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0);

		regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000);

		regmap_write(rt5677->regmap, RT5677_PWR_DIG2, 0x0000);

		regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, 0x0022);

		regmap_write(rt5677->regmap, RT5677_PWR_ANLG1,

			2 << RT5677_LDO1_SEL_SFT |

			2 << RT5677_LDO2_SEL_SFT);

		regmap_write(rt5677->regmap, RT5677_PWR_ANLG2, 0x0000);

		regmap_update_bits(rt5677->regmap,

			RT5677_PR_BASE + RT5677_BIAS_CUR4, 0x0f00, 0x0000);
@@ -4719,7 +4724,8 @@ static int rt5677_probe(struct snd_soc_component *component) 


	regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC,

			~RT5677_IRQ_DEBOUNCE_SEL_MASK, 0x0020);

	regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x0c00);

	regmap_write(rt5677->regmap, RT5677_PWR_DSP2,

			RT5677_PWR_SLIM_ISO | RT5677_PWR_CORE_ISO);



	for (i = 0; i < RT5677_GPIO_NUM; i++)

		rt5677_gpio_config(rt5677, i, rt5677->pdata.gpio_config[i]);

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