Commit 3368e06e authored by Vijay Khemka's avatar Vijay Khemka Committed by Joel Stanley
Browse files

ARM: dts: aspeed: Adding Facebook TiogaPass BMC 



Initial introduction of Facebook TiogaPass family equipped with
Aspeed 2500 BMC SoC. TiogaPass is a x86 server development kit
with a ASPEED ast2500 BMC manufactured by Facebook.

Specifically, This adds the TiogaPass platform device tree file
including the flash layout used by the TiogaPass BMC machines.

Signed-off-by: default avatarVijay Khemka <vijaykhemka@fb.com>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent c8551f6f

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -1200,6 +1200,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ 
	aspeed-ast2500-evb.dtb \

	aspeed-bmc-arm-centriq2400-rep.dtb \

	aspeed-bmc-arm-stardragon4800-rep2.dtb \

	aspeed-bmc-facebook-tiogapass.dtb \

	aspeed-bmc-intel-s2600wf.dtb \

	aspeed-bmc-opp-lanyang.dtb \

	aspeed-bmc-opp-palmetto.dtb \

arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts

0 → 100644
+146 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0+

// Copyright (c) 2018 Facebook Inc.

// Author: Vijay Khemka <vijaykhemka@fb.com>

/dts-v1/;



#include "aspeed-g5.dtsi"

#include <dt-bindings/gpio/aspeed-gpio.h>



/ {

	model = "Facebook TiogaPass BMC";

	compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";

	aliases {

		serial0 = &uart1;

		serial4 = &uart5;

	};

	chosen {

		stdout-path = &uart5;

		bootargs = "console=ttyS4,115200 earlyprintk";

	};



	memory@80000000 {

		reg = <0x80000000 0x20000000>;

	};

};



&fmc {

	status = "okay";

	flash@0 {

		status = "okay";

		m25p,fast-read;

#include "openbmc-flash-layout.dtsi"

	};

};



&spi1 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_spi1_default>;

	flash@0 {

		status = "okay";

		m25p,fast-read;

		label = "pnor";

	};

};



&uart1 {

	// Host Console

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_txd1_default

		     &pinctrl_rxd1_default>;

};



&uart5 {

	// BMC Console

	status = "okay";

};



&mac0 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_rmii1_default>;

	use-ncsi;

};



&i2c0 {

	status = "okay";

	//Airmax Conn B, CPU0 PIROM, CPU1 PIROM

};



&i2c1 {

	status = "okay";

	//X24 Riser

};



&i2c2 {

	status = "okay";

	// Mezz Management SMBus

};



&i2c3 {

	status = "okay";

	// SMBus to Board ID EEPROM

};



&i2c4 {

	status = "okay";

	// BMC Debug Header

};



&i2c5 {

	status = "okay";

	// CPU Voltage regulators

};



&i2c6 {

	status = "okay";

	tpm@20 {

		compatible = "infineon,slb9645tt";

		reg = <0x20>;

	};

	tmp421@4e {

		compatible = "ti,tmp421";

		reg = <0x4e>;

	};

	tmp421@4f {

		compatible = "ti,tmp421";

		reg = <0x4f>;

	};

	eeprom@54 {

		compatible = "atmel,24c64";

		reg = <0x54>;

		pagesize = <32>;

	};

};



&i2c7 {

	status = "okay";

	//HSC, AirMax Conn A

};



&i2c8 {

	status = "okay";

	//Mezz Sensor SMBus

};



&i2c9 {

	status = "okay";

	//USB Debug Connector

};



&pwm_tacho {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;

	fan@0 {

		reg = <0x00>;

		aspeed,fan-tach-ch = /bits/ 8 <0x00>;

	};



	fan@1 {

		reg = <0x00>;

		aspeed,fan-tach-ch = /bits/ 8 <0x01>;

	};

};

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