drm/i915/gvt: use its own define for gpio (336662e5) · Commits · 戴 / test

The definition on i915_reg.h is going to change to depend on dev_priv->gpio_mmio_base being properly initialized. Define our own macros since init_generic_mmio_info() is called before than gpio_mmio_base being set. Cc: intel-gvt-dev@lists.freedesktop.org Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by:

Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:

Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by:

Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180727193647.8639-2-lucas.demarchi@intel.com

drivers/gpu/drm/i915/gvt/handlers.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -2119,7 +2119,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)

		MMIO_F(PCH_GMBUS0, 4 * 4, 0, 0, 0, D_ALL, gmbus_mmio_read,
		gmbus_mmio_write);
		MMIO_F(PCH_GPIOA, 6 * 4, F_UNALIGN, 0, 0, D_ALL, NULL, NULL);
		MMIO_F(PCH_GPIO_BASE, 6 * 4, F_UNALIGN, 0, 0, D_ALL, NULL, NULL);
		MMIO_F(_MMIO(0xe4f00), 0x28, 0, 0, 0, D_ALL, NULL, NULL);

		MMIO_F(_MMIO(_PCH_DPB_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL,

drivers/gpu/drm/i915/gvt/reg.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -77,6 +77,8 @@
		#define _RING_CTL_BUF_SIZE(ctl) (((ctl) & RB_TAIL_SIZE_MASK) + \
		I915_GTT_PAGE_SIZE)

		#define PCH_GPIO_BASE _MMIO(0xc5010)

		#define PCH_GMBUS0 _MMIO(0xc5100)
		#define PCH_GMBUS1 _MMIO(0xc5104)
		#define PCH_GMBUS2 _MMIO(0xc5108)

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