Commit 334b0f09 authored by Kevin Hilman's avatar Kevin Hilman
Browse files

Merge tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc 

From Shawn Guo:

It contains the imx device tree updates for 3.12.

- New pinctrl entry additions for various peripherals
- Devices enabling for imx6, imx5 and imx27 boards
- Add missing device nodes like iim, owire, audmux and sram, etc.
- Various updates on boards like phytec, wandboard and sabresd
- Consolidate pad macros between imx6q and imx6dl

* tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6

: (92 commits)
  ARM: dts: vf610-twr: enable i2c0 device
  ARM: dts: i.MX51: Add one more I2C2 pinmux entry
  ARM: dts: i.MX51: Move pins configuration under "iomuxc" label
  ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
  ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
  ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX
  ARM: dts: i.MX27: Disable AUDMUX in the template
  ARM: dts: wandboard: Add support for SDIO bcm4329
  ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template
  ARM: dts: imx53-qsb: Make USBH1 functional
  ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module
  ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module
  ARM: dts: imx6qdl-sabresd: Add touchscreen support
  ARM: imx: add ocram clock for imx53
  ARM: dts: imx: ocram size is different between imx6q and imx6dl
  ARM: dts: imx27-phytec-phycore-som: Fix regulator settings
  ARM: dts: i.MX27: Remove clock name from CPU node
  ARM: dts: i.MX27: Increase "clock-latency" value
  ARM: dts: i.MX27: Add label to CPU node
  ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC
  ...

Signed-off-by: default avatarKevin Hilman <khilman@linaro.org>
parents 579673ee d45393cd

Documentation/devicetree/bindings/clock/imx5-clock.txt

+1 −0
Original line number Diff line number Diff line
@@ -197,6 +197,7 @@ clocks and IDs. 
	spdif0_gate		183

	spdif1_gate		184

	spdif_ipg_gate		185

	ocram			186



Examples (for mx53):

arch/arm/boot/dts/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -113,6 +113,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx27-pdk.dtb \

	imx27-phytec-phycore-som.dtb \

	imx27-phytec-phycore-rdk.dtb \

	imx27-phytec-phycard-s-som.dtb \

	imx27-phytec-phycard-s-rdk.dtb \

	imx31-bug.dtb \

	imx51-apf51.dtb \

	imx51-apf51dev.dtb \
@@ -132,6 +134,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx6q-sabrelite.dtb \

	imx6q-sabresd.dtb \

	imx6q-sbc6x.dtb \

	imx6q-wandboard.dtb \

	imx6sl-evk.dtb \

	vf610-twr.dtb

dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \

arch/arm/boot/dts/imx25.dtsi

+30 −5
Original line number Diff line number Diff line
@@ -13,19 +13,35 @@ 


/ {

	aliases {

		gpio0 = &gpio1;

		gpio1 = &gpio2;

		gpio2 = &gpio3;

		gpio3 = &gpio4;

		i2c0 = &i2c1;

		i2c1 = &i2c2;

		i2c2 = &i2c3;

		serial0 = &uart1;

		serial1 = &uart2;

		serial2 = &uart3;

		serial3 = &uart4;

		serial4 = &uart5;

		gpio0 = &gpio1;

		gpio1 = &gpio2;

		gpio2 = &gpio3;

		gpio3 = &gpio4;

		spi0 = &spi1;

		spi1 = &spi2;

		spi2 = &spi3;

		usb0 = &usbotg;

		usb1 = &usbhost1;

	};



	cpus {

		#address-cells = <0>;

		#size-cells = <0>;



		cpu {

			compatible = "arm,arm926ej-s";

			device_type = "cpu";

		};

	};



	asic: asic-interrupt-controller@68000000 {

		compatible = "fsl,imx25-asic", "fsl,avic";

		interrupt-controller;
@@ -377,7 +393,8 @@ 
				status = "disabled";

			};



			lcdc@53fbc000 {

			lcdc: lcdc@53fbc000 {

				compatible = "fsl,imx25-fb", "fsl,imx21-fb";

				reg = <0x53fbc000 0x4000>;

				interrupts = <39>;

				clocks = <&clks 103>, <&clks 66>, <&clks 49>;
@@ -424,6 +441,7 @@ 
				reg = <0x53fd4000 0x4000>;

				clocks = <&clks 112>, <&clks 68>;

				clock-names = "ipg", "ahb";

				#dma-cells = <3>;

				interrupts = <34>;

			};
@@ -444,6 +462,13 @@ 
				interrupts = <26>;

			};



			iim: iim@53ff0000 {

				compatible = "fsl,imx25-iim", "fsl,imx27-iim";

				reg = <0x53ff0000 0x4000>;

				interrupts = <19>;

				clocks = <&clks 99>;

			};



			usbphy1: usbphy@1 {

				compatible = "nop-usbphy";

				status = "disabled";

arch/arm/boot/dts/imx27-apf27dev.dts

+5 −0
Original line number Diff line number Diff line
@@ -53,6 +53,11 @@ 
&i2c1 {

	clock-frequency = <400000>;

	status = "okay";



	rtc@68 {

		compatible = "dallas,ds1374";

		reg = <0x68>;

	};

};



&i2c2 {

arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts

0 → 100644
+93 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2012 Markus Pargmann, Pengutronix

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



#include "imx27-phytec-phycard-s-som.dts"



/ {

	model = "Phytec pca100 rapid development kit";

	compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";



	display: display {

		model = "Primeview-PD050VL1";

		native-mode = <&timing0>;

		bits-per-pixel = <16>;  /* non-standard but required */

		fsl,pcr = <0xf0c88080>;	/* non-standard but required */

		display-timings {

			timing0: 640x480 {

				hactive = <640>;

				vactive = <480>;

				hback-porch = <112>;

				hfront-porch = <36>;

				hsync-len = <32>;

				vback-porch = <33>;

				vfront-porch = <33>;

				vsync-len = <2>;

				clock-frequency = <25000000>;

			};

		};

	};



	regulators {

		compatible = "simple-bus";



		reg_3v3: 3v3 {

			compatible = "regulator-fixed";

			regulator-name = "3V3";

			regulator-min-microvolt = <3300000>;

			regulator-max-microvolt = <3300000>;

			regulator-always-on;

		};

	};

};



&fb {

	display = <&display>;

	status = "okay";

};



&i2c1 {

	status = "okay";



	rtc@51 {

		compatible = "nxp,pcf8563";

		reg = <0x51>;

	};



	adc@64 {

		compatible = "maxim,max1037";

		vcc-supply = <&reg_3v3>;

		reg = <0x64>;

	};

};



&owire {

	status = "okay";

};



&sdhci2 {

	cd-gpios = <&gpio3 29 0>;

	status = "okay";

};



&uart1 {

	fsl,uart-has-rtscts;

	status = "okay";

};



&uart2 {

	fsl,uart-has-rtscts;

	status = "okay";

};



&uart3 {

	fsl,uart-has-rtscts;

	status = "okay";

};

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