Commit 32a23653 authored by Maxim Mikityanskiy's avatar Maxim Mikityanskiy Committed by Daniel Borkmann
Browse files

net/mlx5e: Move queue param structs to en/params.h 



structs mlx5e_{rq,sq,cq,channel}_param are going to be used in the
upcoming XSK RX and TX patches. Move them to a header file to make
them accessible from other C files.

Signed-off-by: default avatarMaxim Mikityanskiy <maximmi@mellanox.com>
Signed-off-by: default avatarTariq Toukan <tariqt@mellanox.com>
Acked-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Signed-off-by: default avatarDaniel Borkmann <daniel@iogearbox.net>
parent 0a06382f

drivers/net/ethernet/mellanox/mlx5/core/en/params.h

+31 −0
Original line number Diff line number Diff line
@@ -11,6 +11,37 @@ struct mlx5e_xsk_param { 
	u16 chunk_size;

};



struct mlx5e_rq_param {

	u32                        rqc[MLX5_ST_SZ_DW(rqc)];

	struct mlx5_wq_param       wq;

	struct mlx5e_rq_frags_info frags_info;

};



struct mlx5e_sq_param {

	u32                        sqc[MLX5_ST_SZ_DW(sqc)];

	struct mlx5_wq_param       wq;

	bool                       is_mpw;

};



struct mlx5e_cq_param {

	u32                        cqc[MLX5_ST_SZ_DW(cqc)];

	struct mlx5_wq_param       wq;

	u16                        eq_ix;

	u8                         cq_period_mode;

};



struct mlx5e_channel_param {

	struct mlx5e_rq_param      rq;

	struct mlx5e_sq_param      sq;

	struct mlx5e_sq_param      xdp_sq;

	struct mlx5e_sq_param      icosq;

	struct mlx5e_cq_param      rx_cq;

	struct mlx5e_cq_param      tx_cq;

	struct mlx5e_cq_param      icosq_cq;

};



/* Parameter calculations */



u16 mlx5e_get_linear_rq_headroom(struct mlx5e_params *params,

				 struct mlx5e_xsk_param *xsk);

u32 mlx5e_rx_get_linear_frag_sz(struct mlx5e_params *params,

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+0 −29
Original line number Diff line number Diff line
@@ -57,35 +57,6 @@ 
#include "en/reporter.h"

#include "en/params.h"



struct mlx5e_rq_param {

	u32			rqc[MLX5_ST_SZ_DW(rqc)];

	struct mlx5_wq_param	wq;

	struct mlx5e_rq_frags_info frags_info;

};



struct mlx5e_sq_param {

	u32                        sqc[MLX5_ST_SZ_DW(sqc)];

	struct mlx5_wq_param       wq;

	bool                       is_mpw;

};



struct mlx5e_cq_param {

	u32                        cqc[MLX5_ST_SZ_DW(cqc)];

	struct mlx5_wq_param       wq;

	u16                        eq_ix;

	u8                         cq_period_mode;

};



struct mlx5e_channel_param {

	struct mlx5e_rq_param      rq;

	struct mlx5e_sq_param      sq;

	struct mlx5e_sq_param      xdp_sq;

	struct mlx5e_sq_param      icosq;

	struct mlx5e_cq_param      rx_cq;

	struct mlx5e_cq_param      tx_cq;

	struct mlx5e_cq_param      icosq_cq;

};



bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev)

{

	bool striding_rq_umr = MLX5_CAP_GEN(mdev, striding_rq) &&

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