Commit 31fe8d4e authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Jonathan Cameron
Browse files

iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported 



Move active low and open drain register definitions in hw_settings
register map since not all supported sensors (e.g lsm9ds1) rely on the
same definitions

Fixes: 52f4b1f1 ("iio: imu: st_lsm6dsx: add support for accel/gyro unit of lsm9ds1")
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 7e906103

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h

+2 −0
Original line number Diff line number Diff line
@@ -270,6 +270,8 @@ struct st_lsm6dsx_settings { 
		struct st_lsm6dsx_reg irq2_func;

		struct st_lsm6dsx_reg lir;

		struct st_lsm6dsx_reg clear_on_read;

		struct st_lsm6dsx_reg hla;

		struct st_lsm6dsx_reg od;

	} irq_config;

	struct st_lsm6dsx_odr_table_entry odr_table[2];

	struct st_lsm6dsx_fs_table_entry fs_table[2];

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c

+65 −14
Original line number Diff line number Diff line
@@ -67,11 +67,6 @@ 
#define ST_LSM6DSX_REG_BDU_ADDR			0x12

#define ST_LSM6DSX_REG_BDU_MASK			BIT(6)



#define ST_LSM6DSX_REG_HLACTIVE_ADDR		0x12

#define ST_LSM6DSX_REG_HLACTIVE_MASK		BIT(5)

#define ST_LSM6DSX_REG_PP_OD_ADDR		0x12

#define ST_LSM6DSX_REG_PP_OD_MASK		BIT(4)



static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {

	ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),

	ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
@@ -172,6 +167,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 
				.addr = 0x0d,

				.mask = BIT(3),

			},

			.hla = {

				.addr = 0x22,

				.mask = BIT(5),

			},

			.od = {

				.addr = 0x22,

				.mask = BIT(4),

			},

		},

	},

	{
@@ -265,6 +268,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 
				.addr = 0x5f,

				.mask = BIT(5),

			},

			.hla = {

				.addr = 0x12,

				.mask = BIT(5),

			},

			.od = {

				.addr = 0x12,

				.mask = BIT(4),

			},

		},

		.decimator = {

			[ST_LSM6DSX_ID_ACC] = {
@@ -410,6 +421,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 
				.addr = 0x5f,

				.mask = BIT(5),

			},

			.hla = {

				.addr = 0x12,

				.mask = BIT(5),

			},

			.od = {

				.addr = 0x12,

				.mask = BIT(4),

			},

		},

		.decimator = {

			[ST_LSM6DSX_ID_ACC] = {
@@ -564,6 +583,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 
				.addr = 0x5f,

				.mask = BIT(5),

			},

			.hla = {

				.addr = 0x12,

				.mask = BIT(5),

			},

			.od = {

				.addr = 0x12,

				.mask = BIT(4),

			},

		},

		.decimator = {

			[ST_LSM6DSX_ID_ACC] = {
@@ -712,6 +739,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 
				.addr = 0x56,

				.mask = BIT(6),

			},

			.hla = {

				.addr = 0x12,

				.mask = BIT(5),

			},

			.od = {

				.addr = 0x12,

				.mask = BIT(4),

			},

		},

		.batch = {

			[ST_LSM6DSX_ID_ACC] = {
@@ -868,6 +903,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 
				.addr = 0x5f,

				.mask = BIT(5),

			},

			.hla = {

				.addr = 0x12,

				.mask = BIT(5),

			},

			.od = {

				.addr = 0x12,

				.mask = BIT(4),

			},

		},

		.batch = {

			[ST_LSM6DSX_ID_ACC] = {
@@ -1016,6 +1059,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 
				.addr = 0x5f,

				.mask = BIT(5),

			},

			.hla = {

				.addr = 0x12,

				.mask = BIT(5),

			},

			.od = {

				.addr = 0x12,

				.mask = BIT(4),

			},

		},

		.batch = {

			[ST_LSM6DSX_ID_ACC] = {
@@ -1910,8 +1961,9 @@ static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) 


static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)

{

	struct st_sensors_platform_data *pdata;

	struct device_node *np = hw->dev->of_node;

	struct st_sensors_platform_data *pdata;

	const struct st_lsm6dsx_reg *reg;

	unsigned long irq_type;

	bool irq_active_low;

	int err;
@@ -1932,20 +1984,19 @@ static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) 
		return -EINVAL;

	}



	err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_HLACTIVE_ADDR,

				 ST_LSM6DSX_REG_HLACTIVE_MASK,

				 FIELD_PREP(ST_LSM6DSX_REG_HLACTIVE_MASK,

					    irq_active_low));

	reg = &hw->settings->irq_config.hla;

	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,

				 ST_LSM6DSX_SHIFT_VAL(irq_active_low,

						      reg->mask));

	if (err < 0)

		return err;



	pdata = (struct st_sensors_platform_data *)hw->dev->platform_data;

	if ((np && of_property_read_bool(np, "drive-open-drain")) ||

	    (pdata && pdata->open_drain)) {

		err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_PP_OD_ADDR,

					 ST_LSM6DSX_REG_PP_OD_MASK,

					 FIELD_PREP(ST_LSM6DSX_REG_PP_OD_MASK,

						    1));

		reg = &hw->settings->irq_config.od;

		err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,

					 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));

		if (err < 0)

			return err;

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