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The vibra control register will be used from the ASoC codec driver as well. In order to avoid latency issues caused by I2C read access, cache the two control register within the core driver, so we do not need to reach out to the chip to read it back. Signed-off-by:Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by:
Samuel Ortiz <samuel.ortiz@intel.com> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com>
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