Merge tag 'samsung-dt64-4.7' of... (318085c7) · Commits · 戴 / test

arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi

0 → 100644

+25 −0

Original line number	Diff line number	Diff line
		/*
		* Device tree sources for Exynos7 TMU sensor configuration
		*
		* Copyright (c) 2016 Samsung Electronics Co., Ltd.
		* http://www.samsung.com
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*
		*/

		#include <dt-bindings/thermal/thermal_exynos.h>

		#thermal-sensor-cells = <0>;
		samsung,tmu_gain = <9>;
		samsung,tmu_reference_voltage = <17>;
		samsung,tmu_noise_cancel_mode = <4>;
		samsung,tmu_efuse_value = <75>;
		samsung,tmu_min_efuse_value = <15>;
		samsung,tmu_max_efuse_value = <100>;
		samsung,tmu_first_point_trim = <25>;
		samsung,tmu_second_point_trim = <85>;
		samsung,tmu_default_temp_offset = <50>;
		samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;

0 → 100644

+54 −0

Original line number	Diff line number	Diff line
		/*
		* Device tree sources for default Exynos7 thermal zone definition
		*
		* Copyright (c) 2016 Samsung Electronics Co., Ltd.
		* http://www.samsung.com
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*
		*/

		trips {
		cpu-alert-0 {
		temperature = <75000>; /* millicelsius */
		hysteresis = <10000>; /* millicelsius */
		type = "passive";
		};
		cpu-alert-1 {
		temperature = <80000>; /* millicelsius */
		hysteresis = <10000>; /* millicelsius */
		type = "passive";
		};
		cpu-alert-2 {
		temperature = <85000>; /* millicelsius */
		hysteresis = <10000>; /* millicelsius */
		type = "passive";
		};
		cpu-alert-3 {
		temperature = <90000>; /* millicelsius */
		hysteresis = <10000>; /* millicelsius */
		type = "passive";
		};
		cpu-alert-4 {
		temperature = <95000>; /* millicelsius */
		hysteresis = <10000>; /* millicelsius */
		type = "passive";
		};
		cpu-alert-5 {
		temperature = <100000>; /* millicelsius */
		hysteresis = <10000>; /* millicelsius */
		type = "passive";
		};
		cpu-alert-6 {
		temperature = <110000>; /* millicelsius */
		hysteresis = <10000>; /* millicelsius */
		type = "passive";
		};
		cpu-crit-0 {
		temperature = <115000>; /* millicelsius */
		hysteresis = <0>; /* millicelsius */
		type = "critical";
		};
		};

+49 −0

Original line number	Diff line number	Diff line
		@@ -27,6 +27,7 @@
		pinctrl6 = &pinctrl_fsys0;
		pinctrl7 = &pinctrl_fsys1;
		pinctrl8 = &pinctrl_bus1;
		tmuctrl0 = &tmuctrl_0;
		};

		cpus {
		@@ -95,6 +96,35 @@
		<0x11006000 0x2000>;
		};

		amba {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		pdma0: pdma@10E10000 {
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x10E10000 0x1000>;
		interrupts = <0 225 0>;
		clocks = <&clock_fsys0 ACLK_PDMA0>;
		clock-names = "apb_pclk";
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <32>;
		};

		pdma1: pdma@10EB0000 {
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x10EB0000 0x1000>;
		interrupts = <0 226 0>;
		clocks = <&clock_fsys0 ACLK_PDMA1>;
		clock-names = "apb_pclk";
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <32>;
		};
		};

		clock_topc: clock-controller@10570000 {
		compatible = "samsung,exynos7-clock-topc";
		reg = <0x10570000 0x10000>;
		@@ -538,6 +568,25 @@
		clocks = <&clock_peric0 PCLK_PWM>;
		clock-names = "timers";
		};

		tmuctrl_0: tmu@10060000 {
		compatible = "samsung,exynos7-tmu";
		reg = <0x10060000 0x200>;
		interrupts = <0 108 0>;
		clocks = <&clock_peris PCLK_TMU>,
		<&clock_peris SCLK_TMU>;
		clock-names = "tmu_apbif", "tmu_sclk";
		#include "exynos7-tmu-sensor-conf.dtsi"
		};

		thermal-zones {
		atlas_thermal: cluster0-thermal {
		polling-delay-passive = <0>; /* milliseconds */
		polling-delay = <0>; /* milliseconds */
		thermal-sensors = <&tmuctrl_0>;
		#include "exynos7-trip-points.dtsi"
		};
		};
		};
		};