Commit 316810e8 authored by 周琰杰 (Zhou Yanjie)'s avatar 周琰杰 (Zhou Yanjie) Committed by Stephen Boyd
Browse files

dt-bindings: clock: Add RTC related clocks for Ingenic SoCs. 



Add RTC related clocks bindings for the JZ4780 SoC, the X1000 SoC,
and the X1830 SoC from Ingenic.

Tested-by: default avatar周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: default avatar周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Link: https://lore.kernel.org/r/20200725051136.58220-2-zhouyanjie@wanyeetech.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent b3a9e3b9

include/dt-bindings/clock/jz4780-cgu.h

+2 −0
Original line number Diff line number Diff line
@@ -85,5 +85,7 @@ 
#define JZ4780_CLK_DES		70

#define JZ4780_CLK_X2D		71

#define JZ4780_CLK_CORE1	72

#define JZ4780_CLK_EXCLK_DIV512	73

#define JZ4780_CLK_RTC		74



#endif /* __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ */

include/dt-bindings/clock/x1000-cgu.h

+2 −0
Original line number Diff line number Diff line
@@ -48,5 +48,7 @@ 
#define X1000_CLK_SSI			33

#define X1000_CLK_OST			34

#define X1000_CLK_PDMA			35

#define X1000_CLK_EXCLK_DIV512	36

#define X1000_CLK_RTC			37



#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */

include/dt-bindings/clock/x1830-cgu.h

+2 −0
Original line number Diff line number Diff line
@@ -51,5 +51,7 @@ 
#define X1830_CLK_TCU			36

#define X1830_CLK_DTRNG			37

#define X1830_CLK_OST			38

#define X1830_CLK_EXCLK_DIV512	39

#define X1830_CLK_RTC			40



#endif /* __DT_BINDINGS_CLOCK_X1830_CGU_H__ */

CRA Git | Maintained and supported by SUSTech CRA and CCSE