Commit 30d93227 authored by Jose Abreu's avatar Jose Abreu Committed by David S. Miller
Browse files

net: stmmac: Add support for VLAN Insertion Offload 



Adds the logic to insert a given VLAN ID in a packet. This is offloaded
to HW and its descriptor based. For now, only XGMAC implements the
necessary callbacks.

Signed-off-by: default avatarJose Abreu <joabreu@synopsys.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 81b945ae

drivers/net/ethernet/stmicro/stmmac/common.h

+8 −0
Original line number Diff line number Diff line
@@ -358,6 +358,8 @@ struct dma_features { 
	unsigned int rssen;

	unsigned int vlhash;

	unsigned int sphen;

	unsigned int vlins;

	unsigned int dvlan;

};



/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
@@ -389,6 +391,12 @@ struct dma_features { 
#define STMMAC_RSS_HASH_KEY_SIZE	40

#define STMMAC_RSS_MAX_TABLE_SIZE	256



/* VLAN */

#define STMMAC_VLAN_NONE	0x0

#define STMMAC_VLAN_REMOVE	0x1

#define STMMAC_VLAN_INSERT	0x2

#define STMMAC_VLAN_REPLACE	0x3



extern const struct stmmac_desc_ops enh_desc_ops;

extern const struct stmmac_desc_ops ndesc_ops;

drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h

+15 −0
Original line number Diff line number Diff line
@@ -63,6 +63,11 @@ 
#define XGMAC_VLAN_ETV			BIT(16)

#define XGMAC_VLAN_VID			GENMASK(15, 0)

#define XGMAC_VLAN_HASH_TABLE		0x00000058

#define XGMAC_VLAN_INCL			0x00000060

#define XGMAC_VLAN_VLTI			BIT(20)

#define XGMAC_VLAN_CSVL			BIT(19)

#define XGMAC_VLAN_VLC			GENMASK(17, 16)

#define XGMAC_VLAN_VLC_SHIFT		16

#define XGMAC_RXQ_CTRL0			0x000000a0

#define XGMAC_RXQEN(x)			GENMASK((x) * 2 + 1, (x) * 2)

#define XGMAC_RXQEN_SHIFT(x)		((x) * 2)
@@ -128,6 +133,7 @@ 
#define XGMAC_HWFEAT_RXQCNT		GENMASK(3, 0)

#define XGMAC_HW_FEATURE3		0x00000128

#define XGMAC_HWFEAT_ASP		GENMASK(15, 14)

#define XGMAC_HWFEAT_DVLAN		BIT(13)

#define XGMAC_HWFEAT_FRPES		GENMASK(12, 11)

#define XGMAC_HWFEAT_FRPPB		GENMASK(10, 9)

#define XGMAC_HWFEAT_FRPSEL		BIT(3)
@@ -337,10 +343,14 @@ 
#define XGMAC_REGSIZE			((0x0000317c + (0x80 * 15)) / 4)



/* Descriptors */

#define XGMAC_TDES2_IVT			GENMASK(31, 16)

#define XGMAC_TDES2_IVT_SHIFT		16

#define XGMAC_TDES2_IOC			BIT(31)

#define XGMAC_TDES2_TTSE		BIT(30)

#define XGMAC_TDES2_B2L			GENMASK(29, 16)

#define XGMAC_TDES2_B2L_SHIFT		16

#define XGMAC_TDES2_VTIR		GENMASK(15, 14)

#define XGMAC_TDES2_VTIR_SHIFT		14

#define XGMAC_TDES2_B1L			GENMASK(13, 0)

#define XGMAC_TDES3_OWN			BIT(31)

#define XGMAC_TDES3_CTXT		BIT(30)
@@ -353,10 +363,15 @@ 
#define XGMAC_TDES3_SAIC_SHIFT		23

#define XGMAC_TDES3_THL			GENMASK(22, 19)

#define XGMAC_TDES3_THL_SHIFT		19

#define XGMAC_TDES3_IVTIR		GENMASK(19, 18)

#define XGMAC_TDES3_IVTIR_SHIFT		18

#define XGMAC_TDES3_TSE			BIT(18)

#define XGMAC_TDES3_IVLTV		BIT(17)

#define XGMAC_TDES3_CIC			GENMASK(17, 16)

#define XGMAC_TDES3_CIC_SHIFT		16

#define XGMAC_TDES3_TPL			GENMASK(17, 0)

#define XGMAC_TDES3_VLTV		BIT(16)

#define XGMAC_TDES3_VT			GENMASK(15, 0)

#define XGMAC_TDES3_FL			GENMASK(14, 0)

#define XGMAC_RDES2_HL			GENMASK(9, 0)

#define XGMAC_RDES3_OWN			BIT(31)

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

+14 −0
Original line number Diff line number Diff line
@@ -1150,6 +1150,19 @@ static void dwxgmac2_sarc_configure(void __iomem *ioaddr, int val) 
	writel(value, ioaddr + XGMAC_TX_CONFIG);

}



static void dwxgmac2_enable_vlan(struct mac_device_info *hw, u32 type)

{

	void __iomem *ioaddr = hw->pcsr;

	u32 value;



	value = readl(ioaddr + XGMAC_VLAN_INCL);

	value |= XGMAC_VLAN_VLTI;

	value |= XGMAC_VLAN_CSVL; /* Only use SVLAN */

	value &= ~XGMAC_VLAN_VLC;

	value |= (type << XGMAC_VLAN_VLC_SHIFT) & XGMAC_VLAN_VLC;

	writel(value, ioaddr + XGMAC_VLAN_INCL);

}



const struct stmmac_ops dwxgmac210_ops = {

	.core_init = dwxgmac2_core_init,

	.set_mac = dwxgmac2_set_mac,
@@ -1189,6 +1202,7 @@ const struct stmmac_ops dwxgmac210_ops = { 
	.get_mac_tx_timestamp = dwxgmac2_get_mac_tx_timestamp,

	.flex_pps_config = dwxgmac2_flex_pps_config,

	.sarc_configure = dwxgmac2_sarc_configure,

	.enable_vlan = dwxgmac2_enable_vlan,

};



int dwxgmac2_setup(struct stmmac_priv *priv)

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c

+35 −0
Original line number Diff line number Diff line
@@ -305,6 +305,39 @@ static void dwxgmac2_set_sarc(struct dma_desc *p, u32 sarc_type) 
	p->des3 |= cpu_to_le32(sarc_type & XGMAC_TDES3_SAIC);

}



static void dwxgmac2_set_vlan_tag(struct dma_desc *p, u16 tag, u16 inner_tag,

				  u32 inner_type)

{

	p->des0 = 0;

	p->des1 = 0;

	p->des2 = 0;

	p->des3 = 0;



	/* Inner VLAN */

	if (inner_type) {

		u32 des = inner_tag << XGMAC_TDES2_IVT_SHIFT;



		des &= XGMAC_TDES2_IVT;

		p->des2 = cpu_to_le32(des);



		des = inner_type << XGMAC_TDES3_IVTIR_SHIFT;

		des &= XGMAC_TDES3_IVTIR;

		p->des3 = cpu_to_le32(des | XGMAC_TDES3_IVLTV);

	}



	/* Outer VLAN */

	p->des3 |= cpu_to_le32(tag & XGMAC_TDES3_VT);

	p->des3 |= cpu_to_le32(XGMAC_TDES3_VLTV);



	p->des3 |= cpu_to_le32(XGMAC_TDES3_CTXT);

}



static void dwxgmac2_set_vlan(struct dma_desc *p, u32 type)

{

	type <<= XGMAC_TDES2_VTIR_SHIFT;

	p->des2 |= cpu_to_le32(type & XGMAC_TDES2_VTIR);

}



const struct stmmac_desc_ops dwxgmac210_desc_ops = {

	.tx_status = dwxgmac2_get_tx_status,

	.rx_status = dwxgmac2_get_rx_status,
@@ -332,4 +365,6 @@ const struct stmmac_desc_ops dwxgmac210_desc_ops = { 
	.get_rx_header_len = dwxgmac2_get_rx_header_len,

	.set_sec_addr = dwxgmac2_set_sec_addr,

	.set_sarc = dwxgmac2_set_sarc,

	.set_vlan_tag = dwxgmac2_set_vlan_tag,

	.set_vlan = dwxgmac2_set_vlan,

};

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c

+2 −0
Original line number Diff line number Diff line
@@ -359,6 +359,7 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr, 


	/*  MAC HW feature 0 */

	hw_cap = readl(ioaddr + XGMAC_HW_FEATURE0);

	dma_cap->vlins = (hw_cap & XGMAC_HWFEAT_SAVLANINS) >> 27;

	dma_cap->rx_coe = (hw_cap & XGMAC_HWFEAT_RXCOESEL) >> 16;

	dma_cap->tx_coe = (hw_cap & XGMAC_HWFEAT_TXCOESEL) >> 14;

	dma_cap->eee = (hw_cap & XGMAC_HWFEAT_EEESEL) >> 13;
@@ -413,6 +414,7 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr, 
	/* MAC HW feature 3 */

	hw_cap = readl(ioaddr + XGMAC_HW_FEATURE3);

	dma_cap->asp = (hw_cap & XGMAC_HWFEAT_ASP) >> 14;

	dma_cap->dvlan = (hw_cap & XGMAC_HWFEAT_DVLAN) >> 13;

	dma_cap->frpes = (hw_cap & XGMAC_HWFEAT_FRPES) >> 11;

	dma_cap->frpbs = (hw_cap & XGMAC_HWFEAT_FRPPB) >> 9;

	dma_cap->frpsel = (hw_cap & XGMAC_HWFEAT_FRPSEL) >> 3;

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