Commit 30c19517 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
Browse files

clk: imx: imx31: Remove mx31_clocks_init() 



mx31_clocks_init() has been used to register clocks on i.MX31
non-devicetree platforms.

Now that i.MX is a devicetree-only platform, it is safe to
remove mx31_clocks_init() as there are no more users.

Signed-off-by: default avatarFabio Estevam <festevam@gmail.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4d66bc3c

drivers/clk/imx/clk-imx31.c

+0 −71
Original line number Diff line number Diff line
@@ -132,77 +132,6 @@ static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref) 
	clk_disable_unprepare(clk[iim_gate]);

}



int __init mx31_clocks_init(unsigned long fref)

{

	void __iomem *base;



	base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K);

	if (!base)

		panic("%s: failed to map registers\n", __func__);



	_mx31_clocks_init(base, fref);



	clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");

	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");

	clk_register_clkdev(clk[cspi1_gate], NULL, "imx31-cspi.0");

	clk_register_clkdev(clk[cspi2_gate], NULL, "imx31-cspi.1");

	clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");

	clk_register_clkdev(clk[pwm_gate], "pwm", NULL);

	clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");

	clk_register_clkdev(clk[ckil], "ref", "imx21-rtc");

	clk_register_clkdev(clk[rtc_gate], "ipg", "imx21-rtc");

	clk_register_clkdev(clk[epit1_gate], "epit", NULL);

	clk_register_clkdev(clk[epit2_gate], "epit", NULL);

	clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0");

	clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");

	clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");

	clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");

	clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.0");

	clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.0");

	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");

	clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.1");

	clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.1");

	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");

	clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.2");

	clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.2");

	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");

	clk_register_clkdev(clk[usb_div_post], "per", "imx-udc-mx27");

	clk_register_clkdev(clk[usb_gate], "ahb", "imx-udc-mx27");

	clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");

	clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");

	/* i.mx31 has the i.mx21 type uart */

	clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");

	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");

	clk_register_clkdev(clk[uart2_gate], "per", "imx21-uart.1");

	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1");

	clk_register_clkdev(clk[uart3_gate], "per", "imx21-uart.2");

	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2");

	clk_register_clkdev(clk[uart4_gate], "per", "imx21-uart.3");

	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");

	clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");

	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");

	clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");

	clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");

	clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");

	clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");

	clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0");

	clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1");

	clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");

	clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");

	clk_register_clkdev(clk[firi_gate], "firi", NULL);

	clk_register_clkdev(clk[ata_gate], NULL, "pata_imx");

	clk_register_clkdev(clk[rtic_gate], "rtic", NULL);

	clk_register_clkdev(clk[rng_gate], NULL, "mxc_rnga");

	clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");

	clk_register_clkdev(clk[iim_gate], "iim", NULL);





	imx_register_uart_clocks(uart_clks);

	mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, GPT_TYPE_IMX31);



	return 0;

}



static void __init mx31_clocks_init_dt(struct device_node *np)

{

	struct device_node *osc_np;

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