Commit 3095794a authored by Mika Westerberg's avatar Mika Westerberg Committed by Rafael J. Wysocki
Browse files

ACPI / LPSS: Deassert resets for SPI host controllers on Braswell 



On some Braswell systems BIOS leaves resets for SPI host controllers
active. This prevents the SPI driver from transferring messages on wire.

Fix this in similar way that we do for I2C already by deasserting resets
for the SPI host controllers.

Reported-by: default avatarYang A Fang <yang.a.fang@intel.com>
Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Cc: 3.17+ <stable@vger.kernel.org> # 3.17+
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 3293c7b8

drivers/acpi/acpi_lpss.c

+15 −4
Original line number Diff line number Diff line
@@ -105,9 +105,7 @@ static void lpss_uart_setup(struct lpss_private_data *pdata) 
	}

}



#define LPSS_I2C_ENABLE			0x6c



static void byt_i2c_setup(struct lpss_private_data *pdata)

static void lpss_deassert_reset(struct lpss_private_data *pdata)

{

	unsigned int offset;

	u32 val;
@@ -116,6 +114,13 @@ static void byt_i2c_setup(struct lpss_private_data *pdata) 
	val = readl(pdata->mmio_base + offset);

	val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;

	writel(val, pdata->mmio_base + offset);

}



#define LPSS_I2C_ENABLE			0x6c



static void byt_i2c_setup(struct lpss_private_data *pdata)

{

	lpss_deassert_reset(pdata);



	if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))

		pdata->fixed_clk_rate = 133000000;
@@ -170,6 +175,12 @@ static struct lpss_device_desc byt_i2c_dev_desc = { 
	.setup = byt_i2c_setup,

};



static struct lpss_device_desc bsw_spi_dev_desc = {

	.flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,

	.prv_offset = 0x400,

	.setup = lpss_deassert_reset,

};



#else



#define LPSS_ADDR(desc) (0UL)
@@ -202,7 +213,7 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = { 
	/* Braswell LPSS devices */

	{ "80862288", LPSS_ADDR(byt_pwm_dev_desc) },

	{ "8086228A", LPSS_ADDR(byt_uart_dev_desc) },

	{ "8086228E", LPSS_ADDR(byt_spi_dev_desc) },

	{ "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },

	{ "808622C1", LPSS_ADDR(byt_i2c_dev_desc) },



	{ "INT3430", LPSS_ADDR(lpt_dev_desc) },

CRA Git | Maintained and supported by SUSTech CRA and CCSE