Commit 3077c191 authored by Sean Christopherson's avatar Sean Christopherson Committed by Paolo Bonzini
Browse files

KVM: VMX: Move capabilities structs and helpers to dedicated file 



Defining a separate capabilities.h as opposed to putting this code in
e.g. vmx.h avoids circular dependencies between (the yet-to-be-added)
vmx.h and nested.h.  The aforementioned circular dependencies are why
struct nested_vmx_msrs also resides in capabilities instead of e.g.
nested.h.

Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 7caaa711

arch/x86/kvm/vmx/capabilities.h

0 → 100644
+321 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __KVM_X86_VMX_CAPS_H

#define __KVM_X86_VMX_CAPS_H



#include "lapic.h"



struct nested_vmx_msrs {

	/*

	 * We only store the "true" versions of the VMX capability MSRs. We

	 * generate the "non-true" versions by setting the must-be-1 bits

	 * according to the SDM.

	 */

	u32 procbased_ctls_low;

	u32 procbased_ctls_high;

	u32 secondary_ctls_low;

	u32 secondary_ctls_high;

	u32 pinbased_ctls_low;

	u32 pinbased_ctls_high;

	u32 exit_ctls_low;

	u32 exit_ctls_high;

	u32 entry_ctls_low;

	u32 entry_ctls_high;

	u32 misc_low;

	u32 misc_high;

	u32 ept_caps;

	u32 vpid_caps;

	u64 basic;

	u64 cr0_fixed0;

	u64 cr0_fixed1;

	u64 cr4_fixed0;

	u64 cr4_fixed1;

	u64 vmcs_enum;

	u64 vmfunc_controls;

};



struct vmcs_config {

	int size;

	int order;

	u32 basic_cap;

	u32 revision_id;

	u32 pin_based_exec_ctrl;

	u32 cpu_based_exec_ctrl;

	u32 cpu_based_2nd_exec_ctrl;

	u32 vmexit_ctrl;

	u32 vmentry_ctrl;

	struct nested_vmx_msrs nested;

};

extern struct vmcs_config vmcs_config;



struct vmx_capability {

	u32 ept;

	u32 vpid;

};

extern struct vmx_capability vmx_capability;



static inline bool cpu_has_vmx_basic_inout(void)

{

	return	(((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT);

}



static inline bool cpu_has_virtual_nmis(void)

{

	return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;

}



static inline bool cpu_has_vmx_preemption_timer(void)

{

	return vmcs_config.pin_based_exec_ctrl &

		PIN_BASED_VMX_PREEMPTION_TIMER;

}



static inline bool cpu_has_vmx_posted_intr(void)

{

	return IS_ENABLED(CONFIG_X86_LOCAL_APIC) &&

		vmcs_config.pin_based_exec_ctrl & PIN_BASED_POSTED_INTR;

}



static inline bool cpu_has_load_ia32_efer(void)

{

	return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_EFER) &&

	       (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_EFER);

}



static inline bool cpu_has_load_perf_global_ctrl(void)

{

	return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) &&

	       (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);

}



static inline bool vmx_mpx_supported(void)

{

	return (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_BNDCFGS) &&

		(vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS);

}



static inline bool cpu_has_vmx_tpr_shadow(void)

{

	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;

}



static inline bool cpu_need_tpr_shadow(struct kvm_vcpu *vcpu)

{

	return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu);

}



static inline bool cpu_has_vmx_msr_bitmap(void)

{

	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;

}



static inline bool cpu_has_secondary_exec_ctrls(void)

{

	return vmcs_config.cpu_based_exec_ctrl &

		CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;

}



static inline bool cpu_has_vmx_virtualize_apic_accesses(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;

}



static inline bool cpu_has_vmx_ept(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_EPT;

}



static inline bool vmx_umip_emulated(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_DESC;

}



static inline bool cpu_has_vmx_rdtscp(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_RDTSCP;

}



static inline bool cpu_has_vmx_virtualize_x2apic_mode(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;

}



static inline bool cpu_has_vmx_vpid(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_VPID;

}



static inline bool cpu_has_vmx_wbinvd_exit(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_WBINVD_EXITING;

}



static inline bool cpu_has_vmx_unrestricted_guest(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_UNRESTRICTED_GUEST;

}



static inline bool cpu_has_vmx_apic_register_virt(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_APIC_REGISTER_VIRT;

}



static inline bool cpu_has_vmx_virtual_intr_delivery(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;

}



static inline bool cpu_has_vmx_ple(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_PAUSE_LOOP_EXITING;

}



static inline bool vmx_rdrand_supported(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_RDRAND_EXITING;

}



static inline bool cpu_has_vmx_invpcid(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_INVPCID;

}



static inline bool cpu_has_vmx_vmfunc(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_VMFUNC;

}



static inline bool cpu_has_vmx_shadow_vmcs(void)

{

	u64 vmx_msr;



	/* check if the cpu supports writing r/o exit information fields */

	rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);

	if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))

		return false;



	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_SHADOW_VMCS;

}



static inline bool cpu_has_vmx_encls_vmexit(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENCLS_EXITING;

}



static inline bool vmx_rdseed_supported(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_RDSEED_EXITING;

}



static inline bool cpu_has_vmx_pml(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_ENABLE_PML;

}



static inline bool vmx_xsaves_supported(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_XSAVES;

}



static inline bool cpu_has_vmx_tsc_scaling(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_TSC_SCALING;

}



static inline bool cpu_has_vmx_apicv(void)

{

	return cpu_has_vmx_apic_register_virt() &&

		cpu_has_vmx_virtual_intr_delivery() &&

		cpu_has_vmx_posted_intr();

}



static inline bool cpu_has_vmx_flexpriority(void)

{

	return cpu_has_vmx_tpr_shadow() &&

		cpu_has_vmx_virtualize_apic_accesses();

}



static inline bool cpu_has_vmx_ept_execute_only(void)

{

	return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;

}



static inline bool cpu_has_vmx_ept_4levels(void)

{

	return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;

}



static inline bool cpu_has_vmx_ept_5levels(void)

{

	return vmx_capability.ept & VMX_EPT_PAGE_WALK_5_BIT;

}



static inline bool cpu_has_vmx_ept_mt_wb(void)

{

	return vmx_capability.ept & VMX_EPTP_WB_BIT;

}



static inline bool cpu_has_vmx_ept_2m_page(void)

{

	return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;

}



static inline bool cpu_has_vmx_ept_1g_page(void)

{

	return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;

}



static inline bool cpu_has_vmx_ept_ad_bits(void)

{

	return vmx_capability.ept & VMX_EPT_AD_BIT;

}



static inline bool cpu_has_vmx_invept_context(void)

{

	return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;

}



static inline bool cpu_has_vmx_invept_global(void)

{

	return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;

}



static inline bool cpu_has_vmx_invvpid(void)

{

	return vmx_capability.vpid & VMX_VPID_INVVPID_BIT;

}



static inline bool cpu_has_vmx_invvpid_individual_addr(void)

{

	return vmx_capability.vpid & VMX_VPID_EXTENT_INDIVIDUAL_ADDR_BIT;

}



static inline bool cpu_has_vmx_invvpid_single(void)

{

	return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;

}



static inline bool cpu_has_vmx_invvpid_global(void)

{

	return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;

}



#endif /* __KVM_X86_VMX_CAPS_H */

arch/x86/kvm/vmx/vmx.c

+3 −310
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ 
#include <asm/virtext.h>

#include <asm/vmx.h>



#include "capabilities.h"

#include "cpuid.h"

#include "evmcs.h"

#include "hyperv.h"
@@ -778,35 +779,6 @@ static inline void vmx_check_vmcs12_offsets(void) { 
 */

#define VMCS12_MAX_FIELD_INDEX 0x17



struct nested_vmx_msrs {

	/*

	 * We only store the "true" versions of the VMX capability MSRs. We

	 * generate the "non-true" versions by setting the must-be-1 bits

	 * according to the SDM.

	 */

	u32 procbased_ctls_low;

	u32 procbased_ctls_high;

	u32 secondary_ctls_low;

	u32 secondary_ctls_high;

	u32 pinbased_ctls_low;

	u32 pinbased_ctls_high;

	u32 exit_ctls_low;

	u32 exit_ctls_high;

	u32 entry_ctls_low;

	u32 entry_ctls_high;

	u32 misc_low;

	u32 misc_high;

	u32 ept_caps;

	u32 vpid_caps;

	u64 basic;

	u64 cr0_fixed0;

	u64 cr0_fixed1;

	u64 cr4_fixed0;

	u64 cr4_fixed1;

	u64 vmcs_enum;

	u64 vmfunc_controls;

};



/*

 * The nested_vmx structure is part of vcpu_vmx, and holds information we need

 * for correct emulation of VMX (i.e., nested VMX) on this vcpu.
@@ -1294,7 +1266,6 @@ static inline struct vmcs12 *get_shadow_vmcs12(struct kvm_vcpu *vcpu) 
static bool nested_ept_ad_enabled(struct kvm_vcpu *vcpu);

static unsigned long nested_ept_get_cr3(struct kvm_vcpu *vcpu);

static u64 construct_eptp(struct kvm_vcpu *vcpu, unsigned long root_hpa);

static bool vmx_xsaves_supported(void);

static void vmx_set_segment(struct kvm_vcpu *vcpu,

			    struct kvm_segment *var, int seg);

static void vmx_get_segment(struct kvm_vcpu *vcpu,
@@ -1339,23 +1310,8 @@ static unsigned long *vmx_bitmap[VMX_BITMAP_NR]; 
static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);

static DEFINE_SPINLOCK(vmx_vpid_lock);



static struct vmcs_config {

	int size;

	int order;

	u32 basic_cap;

	u32 revision_id;

	u32 pin_based_exec_ctrl;

	u32 cpu_based_exec_ctrl;

	u32 cpu_based_2nd_exec_ctrl;

	u32 vmexit_ctrl;

	u32 vmentry_ctrl;

	struct nested_vmx_msrs nested;

} vmcs_config;



static struct vmx_capability {

	u32 ept;

	u32 vpid;

} vmx_capability;

struct vmcs_config vmcs_config;

struct vmx_capability vmx_capability;



#define VMX_SEGMENT_FIELD(seg)					\

	[VCPU_SREG_##seg] = {                                   \
@@ -1678,69 +1634,6 @@ static inline bool is_icebp(u32 intr_info) 
		== (INTR_TYPE_PRIV_SW_EXCEPTION | INTR_INFO_VALID_MASK);

}



static inline bool cpu_has_load_ia32_efer(void)

{

	return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_EFER) &&

	       (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_EFER);

}



static inline bool cpu_has_load_perf_global_ctrl(void)

{

	return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) &&

	       (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);

}



static inline bool cpu_has_vmx_msr_bitmap(void)

{

	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;

}



static inline bool cpu_has_vmx_tpr_shadow(void)

{

	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;

}



static inline bool cpu_need_tpr_shadow(struct kvm_vcpu *vcpu)

{

	return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu);

}



static inline bool cpu_has_secondary_exec_ctrls(void)

{

	return vmcs_config.cpu_based_exec_ctrl &

		CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;

}



static inline bool cpu_has_vmx_virtualize_apic_accesses(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;

}



static inline bool cpu_has_vmx_virtualize_x2apic_mode(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;

}



static inline bool cpu_has_vmx_apic_register_virt(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_APIC_REGISTER_VIRT;

}



static inline bool cpu_has_vmx_virtual_intr_delivery(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;

}



static inline bool cpu_has_vmx_encls_vmexit(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENCLS_EXITING;

}



/*

 * Comment's format: document - errata name - stepping - processor name.

 * Refer from
@@ -1787,188 +1680,11 @@ static inline bool cpu_has_broken_vmx_preemption_timer(void) 
	return false;

}



static inline bool cpu_has_vmx_preemption_timer(void)

{

	return vmcs_config.pin_based_exec_ctrl &

		PIN_BASED_VMX_PREEMPTION_TIMER;

}



static inline bool cpu_has_vmx_posted_intr(void)

{

	return IS_ENABLED(CONFIG_X86_LOCAL_APIC) &&

		vmcs_config.pin_based_exec_ctrl & PIN_BASED_POSTED_INTR;

}



static inline bool cpu_has_vmx_apicv(void)

{

	return cpu_has_vmx_apic_register_virt() &&

		cpu_has_vmx_virtual_intr_delivery() &&

		cpu_has_vmx_posted_intr();

}



static inline bool cpu_has_vmx_flexpriority(void)

{

	return cpu_has_vmx_tpr_shadow() &&

		cpu_has_vmx_virtualize_apic_accesses();

}



static inline bool cpu_has_vmx_ept_execute_only(void)

{

	return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;

}



static inline bool cpu_has_vmx_ept_2m_page(void)

{

	return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;

}



static inline bool cpu_has_vmx_ept_1g_page(void)

{

	return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;

}



static inline bool cpu_has_vmx_ept_4levels(void)

{

	return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;

}



static inline bool cpu_has_vmx_ept_mt_wb(void)

{

	return vmx_capability.ept & VMX_EPTP_WB_BIT;

}



static inline bool cpu_has_vmx_ept_5levels(void)

{

	return vmx_capability.ept & VMX_EPT_PAGE_WALK_5_BIT;

}



static inline bool cpu_has_vmx_ept_ad_bits(void)

{

	return vmx_capability.ept & VMX_EPT_AD_BIT;

}



static inline bool cpu_has_vmx_invept_context(void)

{

	return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;

}



static inline bool cpu_has_vmx_invept_global(void)

{

	return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;

}



static inline bool cpu_has_vmx_invvpid_individual_addr(void)

{

	return vmx_capability.vpid & VMX_VPID_EXTENT_INDIVIDUAL_ADDR_BIT;

}



static inline bool cpu_has_vmx_invvpid_single(void)

{

	return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;

}



static inline bool cpu_has_vmx_invvpid_global(void)

{

	return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;

}



static inline bool cpu_has_vmx_invvpid(void)

{

	return vmx_capability.vpid & VMX_VPID_INVVPID_BIT;

}



static inline bool cpu_has_vmx_ept(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_EPT;

}



static inline bool cpu_has_vmx_unrestricted_guest(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_UNRESTRICTED_GUEST;

}



static inline bool cpu_has_vmx_ple(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_PAUSE_LOOP_EXITING;

}



static inline bool cpu_has_vmx_basic_inout(void)

{

	return	(((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT);

}



static inline bool cpu_need_virtualize_apic_accesses(struct kvm_vcpu *vcpu)

{

	return flexpriority_enabled && lapic_in_kernel(vcpu);

}



static inline bool cpu_has_vmx_vpid(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_VPID;

}



static inline bool cpu_has_vmx_rdtscp(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_RDTSCP;

}



static inline bool cpu_has_vmx_invpcid(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_INVPCID;

}



static inline bool cpu_has_virtual_nmis(void)

{

	return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;

}



static inline bool cpu_has_vmx_wbinvd_exit(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_WBINVD_EXITING;

}



static inline bool cpu_has_vmx_shadow_vmcs(void)

{

	u64 vmx_msr;

	rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);

	/* check if the cpu supports writing r/o exit information fields */

	if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))

		return false;



	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_SHADOW_VMCS;

}



static inline bool cpu_has_vmx_pml(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_ENABLE_PML;

}



static inline bool cpu_has_vmx_tsc_scaling(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_TSC_SCALING;

}



static inline bool cpu_has_vmx_vmfunc(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_ENABLE_VMFUNC;

}



static bool vmx_umip_emulated(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_DESC;

}



static inline bool report_flexpriority(void)

{

	return flexpriority_enabled;
@@ -6456,17 +6172,6 @@ static u32 vmx_exec_control(struct vcpu_vmx *vmx) 
	return exec_control;

}



static bool vmx_rdrand_supported(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_RDRAND_EXITING;

}



static bool vmx_rdseed_supported(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_RDSEED_EXITING;

}



static void vmx_compute_secondary_exec_control(struct vcpu_vmx *vmx)

{
@@ -11002,18 +10707,6 @@ static bool vmx_has_emulated_msr(int index) 
	}

}



static bool vmx_mpx_supported(void)

{

	return (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_BNDCFGS) &&

		(vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS);

}



static bool vmx_xsaves_supported(void)

{

	return vmcs_config.cpu_based_2nd_exec_ctrl &

		SECONDARY_EXEC_XSAVES;

}



static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)

{

	u32 exit_intr_info;

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