Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 (3070fb88) · Commits · 戴 / test

Documentation/DocBook/sh.tmpl

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		@@ -79,10 +79,6 @@
		</sect2>
		</sect1>
		</chapter>
		<chapter id="clk">
		<title>Clock Framework Extensions</title>
		!Iinclude/linux/sh_clk.h
		</chapter>
		<chapter id="mach">
		<title>Machine Specific Interfaces</title>
		<sect1 id="dreamcast">

deleted100644 → 0

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		Clock framework on SuperH architecture

		The framework on SH extends existing API by the function clk_set_rate_ex,
		which prototype is as follows:

		clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id)

		The algo_id parameter is used to specify algorithm used to recalculate clocks,
		adjanced to clock, specified as first argument. It is assumed that algo_id==0
		means no changes to adjanced clock

		Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method,
		if it is present in ops structure. The method should set the clock rate and adjust
		all needed clocks according to the passed algo_id.
		Exact values for algo_id are machine-dependent. For the sh7722, the following
		values are defined:

		NO_CHANGE = 0,
		IUS_N1_N1, /* I:U = N:1, U:Sh = N:1 */
		IUS_322, /* I:U:Sh = 3:2:2 */
		IUS_522, /* I:U:Sh = 5:2:2 */
		IUS_N11, /* I:U:Sh = N:1:1 */
		SB_N1, /* Sh:B = N:1 */
		SB3_N1, /* Sh:B3 = N:1 */
		SB3_32, /* Sh:B3 = 3:2 */
		SB3_43, /* Sh:B3 = 4:3 */
		SB3_54, /* Sh:B3 = 5:4 */
		BP_N1, /* B:P = N:1 */
		IP_N1 /* I:P = N:1 */

		Each of these constants means relation between clocks that can be set via the FRQCR
		register

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		@@ -220,8 +220,7 @@ static void pllc2_disable(struct clk *clk)
		__raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR);
		}

		static int pllc2_set_rate(struct clk *clk,
		unsigned long rate, int algo_id)
		static int pllc2_set_rate(struct clk *clk, unsigned long rate)
		{
		unsigned long value;
		int idx;
		@@ -463,8 +462,7 @@ static int fsidiv_enable(struct clk *clk)
		return 0;
		}

		static int fsidiv_set_rate(struct clk *clk,
		unsigned long rate, int algo_id)
		static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
		{
		int idx;

+5 −2

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		@@ -199,10 +199,13 @@ extern unsigned long get_wchan(struct task_struct *p);
		#define ARCH_HAS_PREFETCHW
		static inline void prefetch(void *x)
		{
		__asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
		__builtin_prefetch(x, 0, 3);
		}

		#define prefetchw(x) prefetch(x)
		static inline void prefetchw(void *x)
		{
		__builtin_prefetch(x, 1, 3);
		}
		#endif

		#endif /* __KERNEL__ */

+1 −1

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		@@ -110,7 +110,7 @@ static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
		return 0;
		}

		static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
		static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
		{
		unsigned long frqcr3;
		unsigned int tmp;