Commit 3069290d authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2018-06-06' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 



- Ice Lake's display enabling patches (Jose, Mahesh, Dhinakaran, Paulo, Manasi, Anusha, Arkadiusz)
- Ice Lake's workarounds (Oscar and Yunwei)
- Ice Lake interrupt registers fixes (Oscar)
- Context switch timeline fixes and improvements (Chris)
- Spelling fixes (Colin)
- GPU reset fixes and improvements (Chris)
  - Including fixes on execlist and preemption for a proper GPU reset (Chris)
- Clean-up the port pipe select bits (Ville)
- Other execlist improvements (Chris)
- Remove unused enable_cmd_parser parameter (Chris)
- Fix order of enabling pipe/transcoder/planes on HSW+ to avoid hang on ICL (Paulo)
- Simplification and changes on intel_context (Chris)
- Disable LVDS on Radiant P845 (Ondrej)
- Improve HSW/BDW voltage swing handling (Ville)
- Cleanup and renames on few parts of intel_dp code to make code clear and less confusing (Ville)
- Move acpi lid notification code for fixing LVDS (Chris)
- Speed up GPU idle detection (Chris)
- Make intel_engine_dump irqsafe (Chris)
- Fix GVT crash (Zhenyu)
- Move GEM BO inside drm_framebuffer and use intel_fb_obj everywhere (Chris)
- Revert edp's alternate fixed mode (Jani)
- Protect tainted function pointer lookup (Chris)
  - And subsequent unsigned long size fix (Chris)
- Allow page directory allocation to fail (Chris)
- VBT's edp and lvds fix and clean-up (Ville)
- Many other reorganizations and cleanups on DDI and DP code, as well on scaler and planes (Ville)
- Selftest pin the mock kernel context (Chris)
- Many PSR Fixes, clean-up and improvements (Dhinakaran)
- PSR VBT fix (Vathsala)
- Fix i915_scheduler and intel_context declaration (Tvrtko)
- Improve PCH underruns detection on ILK-IVB (Ville)
- Few s/drm_priv/i915 (Chris, Michal)
- Notify opregion of the sanitized encoder state (Maarten)
- Guc's event handling improvements and fixes on initialization failures (Michal)
- Many gtt fixes and improvements (Chris)
- Fixes and improvements for Suspend and Freeze safely (Chris)
- i915_gem init and fini cleanup and fixes (Michal)
- Remove obsolete switch_mm for gen8+ (Chris)
- hw and context id fixes for GuC (Lionel)
- Add new vGPU cap info bit VGT_CAPS_HUGE_GTT (Changbin)
- Make context pin/unpin symmetric (Chris)
- vma: Move the bind_count vs pin_count assertion to a helper (Chris)
- Use available SZ_1M instead of 1 << 20 (Chris)
- Trace and PMU fixes and improvements (Tvrtko)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180611162737.GA2378@intel.com
parents ce397d21 14c3f842

drivers/gpu/drm/i915/gvt/aperture_gm.c

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm) 
	}



	mutex_lock(&dev_priv->drm.struct_mutex);

	ret = i915_gem_gtt_insert(&dev_priv->ggtt.base, node,

	ret = i915_gem_gtt_insert(&dev_priv->ggtt.vm, node,

				  size, I915_GTT_PAGE_SIZE,

				  I915_COLOR_UNEVICTABLE,

				  start, end, flags);

drivers/gpu/drm/i915/gvt/display.c

+2 −2
Original line number Diff line number Diff line
@@ -273,8 +273,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) 
	for_each_pipe(dev_priv, pipe) {

		vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE;

		vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;

		vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~CURSOR_MODE;

		vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= CURSOR_MODE_DISABLE;

		vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE;

		vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;

	}



	vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE;

drivers/gpu/drm/i915/gvt/fb_decoder.c

+6 −6
Original line number Diff line number Diff line
@@ -300,16 +300,16 @@ static int cursor_mode_to_drm(int mode) 
	int cursor_pixel_formats_index = 4;



	switch (mode) {

	case CURSOR_MODE_128_ARGB_AX:

	case MCURSOR_MODE_128_ARGB_AX:

		cursor_pixel_formats_index = 0;

		break;

	case CURSOR_MODE_256_ARGB_AX:

	case MCURSOR_MODE_256_ARGB_AX:

		cursor_pixel_formats_index = 1;

		break;

	case CURSOR_MODE_64_ARGB_AX:

	case MCURSOR_MODE_64_ARGB_AX:

		cursor_pixel_formats_index = 2;

		break;

	case CURSOR_MODE_64_32B_AX:

	case MCURSOR_MODE_64_32B_AX:

		cursor_pixel_formats_index = 3;

		break;
@@ -342,8 +342,8 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, 
		return -ENODEV;



	val = vgpu_vreg_t(vgpu, CURCNTR(pipe));

	mode = val & CURSOR_MODE;

	plane->enabled = (mode != CURSOR_MODE_DISABLE);

	mode = val & MCURSOR_MODE;

	plane->enabled = (mode != MCURSOR_MODE_DISABLE);

	if (!plane->enabled)

		return -ENODEV;

drivers/gpu/drm/i915/gvt/gvt.h

+2 −2
Original line number Diff line number Diff line
@@ -361,9 +361,9 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt); 
#define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_end)

#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.gmadr.start)



#define gvt_ggtt_gm_sz(gvt)	  (gvt->dev_priv->ggtt.base.total)

#define gvt_ggtt_gm_sz(gvt)	  (gvt->dev_priv->ggtt.vm.total)

#define gvt_ggtt_sz(gvt) \

	((gvt->dev_priv->ggtt.base.total >> PAGE_SHIFT) << 3)

	((gvt->dev_priv->ggtt.vm.total >> PAGE_SHIFT) << 3)

#define gvt_hidden_sz(gvt)	  (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt))



#define gvt_aperture_gmadr_base(gvt) (0)

drivers/gpu/drm/i915/gvt/mmio_context.c

+3 −3
Original line number Diff line number Diff line
@@ -446,9 +446,9 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next, 


#define CTX_CONTEXT_CONTROL_VAL	0x03



bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id)

bool is_inhibit_context(struct intel_context *ce)

{

	u32 *reg_state = ctx->__engine[ring_id].lrc_reg_state;

	const u32 *reg_state = ce->lrc_reg_state;

	u32 inhibit_mask =

		_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
@@ -501,7 +501,7 @@ static void switch_mmio(struct intel_vgpu *pre, 
			 * itself.

			 */

			if (mmio->in_context &&

			    !is_inhibit_context(s->shadow_ctx, ring_id))

			    !is_inhibit_context(&s->shadow_ctx->__engine[ring_id]))

				continue;



			if (mmio->mask)

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