Commit 30316c4f authored by Takeshi Kihara's avatar Takeshi Kihara Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a77995: Add SCIF {0,1,3,4,5} and all HSCIF device nodes



This patch adds the device nodes for SCIF {0,1,3,4,5} and all HSCIF serial
ports, incl. clocks, power domain and DMAs.

Signed-off-by: default avatarTakeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: default avatarUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 55697cbb
Loading
Loading
Loading
Loading
+118 −0
Original line number Diff line number Diff line
@@ -242,6 +242,41 @@
			resets = <&cpg 407>;
		};

		hscif0: serial@e6540000 {
			compatible = "renesas,hscif-r8a77995",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
			reg = <0 0xe6540000 0 0x60>;
			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 520>,
				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
			       <&dmac2 0x31>, <&dmac2 0x30>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
			resets = <&cpg 520>;
			status = "disabled";
		};

		hscif3: serial@e66a0000 {
			compatible = "renesas,hscif-r8a77995",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
			reg = <0 0xe66a0000 0 0x60>;
			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 517>,
				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
			dma-names = "tx", "rx";
			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
			resets = <&cpg 517>;
			status = "disabled";
		};

		i2c0: i2c@e6500000 {
			#address-cells = <1>;
			#size-cells = <0>;
@@ -605,6 +640,40 @@
			status = "disabled";
		};

		scif0: serial@e6e60000 {
			compatible = "renesas,scif-r8a77995",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6e60000 0 64>;
			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 207>,
				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x51>, <&dmac1 0x50>,
			       <&dmac2 0x51>, <&dmac2 0x50>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
			resets = <&cpg 207>;
			status = "disabled";
		};

		scif1: serial@e6e68000 {
			compatible = "renesas,scif-r8a77995",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6e68000 0 64>;
			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 206>,
				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x53>, <&dmac1 0x52>,
			       <&dmac2 0x53>, <&dmac2 0x52>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
			resets = <&cpg 206>;
			status = "disabled";
		};

		scif2: serial@e6e88000 {
			compatible = "renesas,scif-r8a77995",
				     "renesas,rcar-gen3-scif", "renesas,scif";
@@ -622,6 +691,55 @@
			status = "disabled";
		};

		scif3: serial@e6c50000 {
			compatible = "renesas,scif-r8a77995",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6c50000 0 64>;
			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 204>,
				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
			dma-names = "tx", "rx";
			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
			resets = <&cpg 204>;
			status = "disabled";
		};

		scif4: serial@e6c40000 {
			compatible = "renesas,scif-r8a77995",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6c40000 0 64>;
			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 203>,
				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
			dma-names = "tx", "rx";
			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
			resets = <&cpg 203>;
			status = "disabled";
		};

		scif5: serial@e6f30000 {
			compatible = "renesas,scif-r8a77995",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6f30000 0 64>;
			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 202>,
				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
			       <&dmac2 0x5b>, <&dmac2 0x5a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
			resets = <&cpg 202>;
			status = "disabled";
		};

		msiof0: spi@e6e90000 {
			compatible = "renesas,msiof-r8a77995",
				     "renesas,rcar-gen3-msiof";