Commit 2fe743c2 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-arm64-dt-for-v5.2' of... 

Merge tag 'renesas-arm64-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Renesas ARM64 Based SoC DT Updates for v5.2

* R-Car Gen3 SoC based Salvator-X and Salvator-XS boards
  - Add GPIO keys support
  - Sort rwdt node alphabetically

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
  - Use extended audio DMAC register

* R-Car M3-W (r8a7796) SoC
  - Remove unneeded sound #address/size-cells

* R-Car M3-N (r8a77965) SoC
  - Add SSIU support for audio

* R-Car E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs
  - Remove invalid compatible value for CSI40

* R-Car E3 (r8a77990) SoC
  - Cprrect SPDX license identifier style

* R-Car E3 (r8a77990) based Ebisu board
  - Add BD9571 PMIC with DDR0 backup power config
  - Correct adv7482 hexadecimal register address
  - Add GPIO expander

* R-Car E3 (r8a77990) based Ebisu and D3 (r8a77995) based Draak boards
  - Update bootargs to bring them into line with other R-Car Gen3 boards
  - Enable LVDS1 encoder

* R-Car D3 (r8a77995) based Draak board
  - Correct EthernetAVB phy mode
  - Enable CAN0 and CAN1

* RZ/G2E (r8a774c0) SoC
  - Add CANFD support
  - Correct CPU node style

* RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs
  - Add clkp2 clock to CAN nodes

* RZ/G2E (r8a774c0) based EK874 board
  - Add LED, CAN and RTC support

* tag 'renesas-arm64-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (26 commits)
  arm64: dts: renesas: salvator-common: Add GPIO keys support
  arm64: dts: renesas: use extended audio dmac register
  arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmii
  arm64: dts: renesas: salvator-common: Sort node label
  arm64: dts: renesas: Update Ebisu and Draak bootargs
  arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes
  arm64: dts: renesas: r8a774c0: Add CANFD support
  arm64: dts: renesas: r8a774a1: Add clkp2 clock to CAN nodes
  arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config
  arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC
  arm64: dts: renesas: r8a77990: Remove invalid compatible value for CSI40
  arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40
  arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1
  arm64: dts: renesas: r8a774c0-cat874: Add RWDT support
  arm64: dts: renesas: ebisu: Enable VIN5
  arm64: dts: renesas: r8a774c0-cat874: Add LEDs support
  arm64: dts: renesas: r8a774c0-cat874: add RTC support
  arm64: dts: renesas: cat875: Add CAN support
  arm64: dts: renesas: r8a774c0: Fix cpu nodes style
  arm64: dts: renesas: r8a77965: add SSIU support for sound
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 1a88083b e3414b8c

arch/arm64/boot/dts/renesas/cat875.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -30,6 +30,18 @@ 
	};

};



&can0 {

	pinctrl-0 = <&can0_pins>;

	pinctrl-names = "default";

	status = "okay";

};



&can1 {

	pinctrl-0 = <&can1_pins>;

	pinctrl-names = "default";

	status = "okay";

};



&pciec0 {

	status = "okay";

};
@@ -41,4 +53,14 @@ 
			function = "avb";

		};

	};



	can0_pins: can0 {

		groups = "can0_data";

		function = "can0";

	};



	can1_pins: can1 {

		groups = "can1_data";

		function = "can1";

	};

};

arch/arm64/boot/dts/renesas/r8a774a1.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -879,8 +879,10 @@ 
				     "renesas,rcar-gen3-can";

			reg = <0 0xe6c30000 0 0x1000>;

			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 916>, <&can_clk>;

			clock-names = "clkp1", "can_clk";

			clocks = <&cpg CPG_MOD 916>,

				 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "clkp1", "clkp2", "can_clk";

			power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;

			resets = <&cpg 916>;

			status = "disabled";
@@ -891,8 +893,10 @@ 
				     "renesas,rcar-gen3-can";

			reg = <0 0xe6c38000 0 0x1000>;

			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 915>, <&can_clk>;

			clock-names = "clkp1", "can_clk";

			clocks = <&cpg CPG_MOD 915>,

				 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "clkp1", "clkp2", "can_clk";

			power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;

			resets = <&cpg 915>;

			status = "disabled";

arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts

+47 −0
Original line number Diff line number Diff line
@@ -22,6 +22,30 @@ 
		stdout-path = "serial0:115200n8";

	};



	leds {

		compatible = "gpio-leds";



		led0 {

			gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;

			label = "LED0";

		};



		led1 {

			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;

			label = "LED1";

		};



		led2 {

			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;

			label = "LED2";

		};



		led3 {

			gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;

			label = "LED3";

		};

	};



	memory@48000000 {

		device_type = "memory";

		/* first 128MB is reserved for secure area. */
@@ -56,6 +80,19 @@ 
	clock-frequency = <48000000>;

};



&i2c1 {

	pinctrl-0 = <&i2c1_pins>;

	pinctrl-names = "default";



	status = "okay";

	clock-frequency = <400000>;



	rtc@32 {

		compatible = "epson,rx8571";

		reg = <0x32>;

	};

};



&pcie_bus_clk {

	clock-frequency = <100000000>;

};
@@ -66,6 +103,11 @@ 
};



&pfc {

	i2c1_pins: i2c1 {

		groups = "i2c1_b";

		function = "i2c1";

	};



	scif2_pins: scif2 {

		groups = "scif2_data_a";

		function = "scif2";
@@ -84,6 +126,11 @@ 
	};

};



&rwdt {

	timeout-sec = <60>;

	status = "okay";

};



&scif2 {

	pinctrl-0 = <&scif2_pins>;

	pinctrl-names = "default";

arch/arm64/boot/dts/renesas/r8a774c0.dtsi

+36 −8
Original line number Diff line number Diff line
@@ -969,8 +969,10 @@ 
				     "renesas,rcar-gen3-can";

			reg = <0 0xe6c30000 0 0x1000>;

			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 916>, <&can_clk>;

			clock-names = "clkp1", "can_clk";

			clocks = <&cpg CPG_MOD 916>,

				 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "clkp1", "clkp2", "can_clk";

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 916>;

			status = "disabled";
@@ -981,13 +983,40 @@ 
				     "renesas,rcar-gen3-can";

			reg = <0 0xe6c38000 0 0x1000>;

			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 915>, <&can_clk>;

			clock-names = "clkp1", "can_clk";

			clocks = <&cpg CPG_MOD 915>,

				 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "clkp1", "clkp2", "can_clk";

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 915>;

			status = "disabled";

		};



		canfd: can@e66c0000 {

			compatible = "renesas,r8a774c0-canfd",

				     "renesas,rcar-gen3-canfd";

			reg = <0 0xe66c0000 0 0x8000>;

			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 914>,

				 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "fck", "canfd", "can_clk";

			assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;

			assigned-clock-rates = <40000000>;

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 914>;

			status = "disabled";



			channel0 {

				status = "disabled";

			};



			channel1 {

				status = "disabled";

			};

		};



		pwm0: pwm@e6e30000 {

			compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";

			reg = <0 0xe6e30000 0 0x8>;
@@ -1740,8 +1769,7 @@ 
		};



		csi40: csi2@feaa0000 {

			compatible = "renesas,r8a774c0-csi2",

				     "renesas,rcar-gen3-csi2";

			compatible = "renesas,r8a774c0-csi2";

			reg = <0 0xfeaa0000 0 0x10000>;

			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 716>;

arch/arm64/boot/dts/renesas/r8a7795.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -1836,7 +1836,7 @@ 
				<0 0xec5a0000 0 0x100>,  /* ADG */

				<0 0xec540000 0 0x1000>, /* SSIU */

				<0 0xec541000 0 0x280>,  /* SSI */

				<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/

				<0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/

			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";



			clocks = <&cpg CPG_MOD 1005>,

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